參數(shù)資料
型號: MK1493-02AGLF
元件分類: 時鐘產(chǎn)生/分配
英文描述: 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
封裝: 6.10 MM, 0.50 MM PITCH, TSSOP-56
文件頁數(shù): 2/24頁
文件大?。?/td> 444K
代理商: MK1493-02AGLF
Networking/PCI Clock Generator
MDS 1493-02A C
10
Revision 020204
Integrated Circuit Systems, Inc.
525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
MK1493-02A
Byte 10: Programming Enable Register
Byte 11: VCO Frequency M Divider (Reference divider) Control Register
Byte 12: VCO Frequency N Divider (VCO divider) Control Register
Bit
Name
PUP
Description
Bit 7
M/N
Program
Enable
0
Programming Enable bit
0 = no programming. Frequencies are selected by
HW latches or by Byte 0,
1 = enable all SMBUS programming
Bit 6
WD Enable
0
RESERVED
Bit 5
WD Alarm
0
RESERVED
Bit 4
-
RESERVED
Bit 3
-
Bit 2
-
Bit 1
-
Bit 0
-
Bit
Name
PUP
Description
Bit 7
Ndiv8
X
N divider bit 8
Bit 6
Mdiv6
X
The decimal representation of Mdiv (6:0) corresponds
to the reference divider value. Default at power up is
equal to the latched inputs selection.
Bit 5
Mdiv5
X
Bit 4
Mdiv4
X
Bit 3
Mdiv3
X
Bit 2
Mdiv2
X
Bit 1
Mdiv1
X
Bit 0
Mdiv0
X
Bit
Name
PUP
Description
Bit 7
Ndiv7
X
The decimal representation of Ndiv (7:0) corresponds
to the VCO divider value. Default at power up is equal
to the latched inputs selection. Notice Ndiv 8 is
located in Byte 11.
Bit 6
Ndiv6
X
Bit 5
Ndiv5
X
Bit 4
Ndiv4
X
Bit 3
Ndiv3
X
Bit 2
Ndiv2
X
Bit 1
Ndiv1
X
Bit 0
Ndiv0
X
相關(guān)PDF資料
PDF描述
MK1493-02AGLFTR 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
MK1493-02AG 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
MK2049-10SITRLF 44.736 MHz, OTHER CLOCK GENERATOR, PDSO20
MK2049-10SI 44.736 MHz, OTHER CLOCK GENERATOR, PDSO20
MK2049-10SI 44.736 MHz, OTHER CLOCK GENERATOR, PDSO20
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