參數(shù)資料
型號(hào): MK1493-02AGTR
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時(shí)鐘產(chǎn)生/分配
英文描述: 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
封裝: 6.10 MM, 0.50 MM PITCH, TSSOP-56
文件頁(yè)數(shù): 21/24頁(yè)
文件大?。?/td> 444K
代理商: MK1493-02AGTR
Networking/PCI Clock Generator
MDS 1493-02A C
6
Revision 020204
Integrated Circuit Systems, Inc.
525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
MK1493-02A
Serial Configuration Command Bitmap Byte 0: Functionary and frequency select register (default = 0)
Bit
Description
SSEN
FS3
FS2
FS1
FS0
CPUCLK
(MHz)
DDR
(MHz)
PCI
(MHz)
PCI_X F in
DDR
Diff
Out
Spread Percentage Power up
Bit2
Bit7
Bit6
Bit5
Bit4
0
0000
Reserved
N
0
0001
Reserved
N
0
0010
Reserved
N
0
0011
Reserved
N
0
0100
33
50
N
0
0101
100
133
33
50
N
0
0110
33
25
N
0
0111
33
133
25
N
0
1000
100
200
66
33
25
Y
N
Default
0
1001
200
66
33
25
Y
N
0
1010
133
33
66
25
Y
N
0
1011
133
33
25
Y
N
0
1100
133
66
25
Y
N
0
1101
150
33
25
Y
N
0
1110
125
33
25
Y
N
0
1111
166
33
25
Y
N
1
0000
Reserved
N
(1% down spread)
1
0001
Reserved
N
(1% down spread)
1
0010
Reserved
N
(1% down spread)
1
0011
Reserved
N
(1% down spread)
1
0100
33
50
N
(1% down spread)
1
0101
100
133
33
50
N
(1% down spread)
1
0110
33
25
N
(1% down spread)
1
0111
33
133
25
N
(1% down spread)
1
1000
100
200
66
33
25
Y
(1% down spread)
1
1001
200
66
33
25
Y
(1% down spread)
1
1010
133
33
66
25
Y
(1% down spread)
1
1011
133
33
25
Y
(1% down spread)
1
1100
133
66
25
Y
(1% down spread)
1
1101
150
33
25
Y
(1% down spread)
1
1110
125
33
25
Y
(1% down spread)
1
1111
166
33
25
Y
(1% down spread)
Bit3
0 - Frequency is selected by hardware select, Latched inputs
1 - Frequency is selected by Bit 2, 7:4
Bit 1 RESERVED
Bit 0
0 - Running
1 - Tristate all outputs
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