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參數(shù)資料
| 型號： | MK2049-45ASILFTR |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 5/10頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLK PLL COMM 3.3V 20-SOIC |
| 標準包裝： | 1,000 |
| 類型： | PLL 時鐘合成器 |
| PLL： | 是 |
| 輸入： | 時鐘 |
| 輸出： | 時鐘 |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:3 |
| 差分 - 輸入:輸出： | 無/無 |
| 頻率 - 最大： | 51.84MHz |
| 除法器/乘法器： | 是/是 |
| 電源電壓： | 3.15 V ~ 3.45 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-SOIC（0.295"，7.50mm 寬） |
| 供應商設(shè)備封裝： | 20-SOIC |
| 包裝： | 帶卷 (TR) |
MK2049-45A
3.3 VOLT COMMUNICATIONS CLOCK PLL
VCXO AND SYNTHESIZER
IDT 3.3 VOLT COMMUNICATIONS CLOCK PLL
4
MK2049-45A
REV C 051310
generate a low jitter, low phase-noise output clock within a
low bandwidth PLL. This serves to provide input clock jitter
attenuation and enables stable operation with a low
frequency reference clock.
The VCXO circuit requires an external pullable crystal for
operation. External loop filter components enable a PLL
configuration with low loop bandwidth.
Application Information
Output Frequency Configuration
The MK2049-45A is configured to generate a set of output
frequencies from an 8 kHz input clock. Please refer to the
Output Clock Selection Table on Page 2. Input bits FS3:0
are set according to this table, as is the external crystal
frequency. Please refer to the Quartz Crystal section on this
page regarding external crystal requirements.
Quartz Crystal
It is important that the correct type of quartz crystal is used
with the MK2049-45A. Failure to do so may result in reduced
frequency pullability range, inability of the loop to lock, or
excessive output phase jitter.
The MK2049-45A operates by phase-locking the VCXO
circuit to the input signal of the selected ICLK input. The
VCXO consists of the external crystal and the integrated
VCXO oscillator circuit. To achieve the best performance
and reliability, a crystal device with the recommended
parameters (shown below) must be used, and the layout
guidelines discussed in the PCB Layout Recommendations
section must be followed.
The frequency of oscillation of a quartz crystal is determined
by its cut and by the external load capacitance. The
MK2049-45A incorporates variable load capacitors on-chip
which “pull”, or change, the frequency of the crystal. The
crystals specified for use with the MK2049-45A are
designed to have zero frequency error when the total of
on-chip + stray capacitance is 14 pF. To achieve this, the
layout should use short traces between the MK2049-45A
and the crystal.
To obtain a list of qualified crystal devices please visit our
website.
PLL Loop Filter Components
All analog PLL circuits use a loop filter to establish operating
stability. The MK2049-45A uses external loop filter
components for the following reasons:
1) Larger loop filter capacitor values can be used, allowing
a lower loop bandwidth. This enables the use of lower input
clock reference frequencies and also input clock jitter
attenuation capabilities. Larger loop filter capacitors also
allow higher loop damping factors when less passband
peaking is desired.
2) The loop filter values can be user selected to optimize
loop response characteristics for a given application.
Referencing the External Component Schematic on this
page, the external loop filter is made up of components RS,
CS and CP. RSET establishes PLL charge pump current and
therefore influences loop filter characteristics.
Tools for optimizing the values of these four components
can be found on our web site.
CAP2
CAP1
0.0003 F
820 kohms
0.1 F
Figure 3. Typical Loop Filter
R
S
C
P
C
S
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MK2049-45ASITR | 功能描述:IC CLK PLL COMM 3.3V 20-SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應商設(shè)備封裝:* 包裝:* |
| MK2049-45SI | 功能描述:IC CLK PLL COMM 3.3V 20-SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應商設(shè)備封裝:* 包裝:* |
| MK2049-45SILF | 功能描述:時鐘合成器/抖動清除器 3.3 VOLT COMMUNICA. CLOCK VCXO PLL RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| MK2049-45SILFTR | 功能描述:時鐘合成器/抖動清除器 3.3 VOLT COMMUNICA. CLOCK VCXO PLL RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| MK2049-45SITR | 功能描述:IC CLK PLL COMM 3.3V 20-SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應商設(shè)備封裝:* 包裝:* |
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