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參數(shù)資料
| 型號： | MK2069-04GILFTR |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 18/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC VCXO CLK TRANSLATOR 56-TSSOP |
| 標準包裝： | 1,000 |
| 類型： | 時鐘同步器 |
| PLL： | 是 |
| 輸入： | LVCMOS |
| 輸出： | LVCMOS |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:3 |
| 差分 - 輸入:輸出： | 無/無 |
| 頻率 - 最大： | 160MHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 3.15 V ~ 3.45 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 56-TFSOP（0.240"，6.10mm 寬） |
| 供應商設(shè)備封裝： | 56-TSSOP |
| 包裝： | 帶卷 (TR) |
MK2069-04
VCXO-BASED UNIVERSAL CLOCK TRANSLATOR
VCXO AND SYNTHESIZER
IDT VCXO-BASED UNIVERSAL CLOCK TRANSLATOR
7
MK2069-04
REV J 051310
CP establishes a second pole in the VCXO PLL loop filter.
For higher damping factors (> 1), calculate the value of CP
based on a CS value that would be used for a damping factor
of 1. This will minimize baseband peaking and loop
instability that can lead to output jitter.
CP also dampens VCXO input voltage modulation by the
charge pump correction pulses. A CP value that is too low
will result in increased output phase noise at the phase
detector frequency due to this. In extreme cases where
input jitter is high, charge pump current is high, and CP is too
small, the VCXO input voltage can hit the supply or ground
rail resulting in non-linear loop response.
The best way to set the value of CP is to use the filter
response software available from IDT (please refer to the
following section). CP should be increased in value until it
just starts affecting the passband peak.
Loop Filter Response Software
Online tools to calculate loop filter response can be found at
www.idt.com/?app=calculators&source=support_menu.
Graph of Charge Pump Current vs. Value of RSET (external resistor)
Charge Pump Current, Example Settings from
Above Graph
Setting Charge Pump Current
The recommended range for the charge pump current is 25
A to 300 A. Below 25 A, loop filter charge leakage, due
to PCB or capacitor leakage, can become a problem. This
loop filter leakage can cause locking problems, output clock
cycle slips, or low frequency phase noise.
As can be seen in the loop bandwidth and damping factor
equations or by using the filter response software available
from IDT, increasing charge pump current (ICP) increases
both bandwidth and damping factor.
C
P
C
S
20
------
=
10E-6
100E-6
1E-3
100E+3
1E+6
10E+6
RSET, ohms
I CP
,A
m
ps
Recommended Range
of Operation
RSET
Charge Pump Current
(ICP)
5 M
Ω
25
μA
3 M
Ω
42
μA
2 M
Ω
65
μA
1 M
Ω
125
μA
480 k
Ω
255
μA
400 k
Ω
300
μA
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| MK2069-04GITR | 功能描述:IC VCXO CLK TRANSLATOR 56-TSSOP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應商設(shè)備封裝:* 包裝:* |
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| MK206S 454634MK | 制造商:NSF (CONTROLS) 功能描述:WAFER MK 2POLE 6 POS 制造商:NSF (CONTROLS) 功能描述:WAFER, MK, 2POLE, 6 POS 制造商:NSF (CONTROLS) 功能描述:WAFER, MK, 2POLE, 6 POS; No. of Poles:2; No. of Positions:6; SVHC:No SVHC (19-Dec-2012); Contact Current @ Contact Voltage AC Max:500mA; Contact Current AC Max:5A; Contact Current DC Max:5A; Contact Current Rating:5A; Contact ;RoHS Compliant: Yes |
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