參數(shù)資料
型號: MK3722GLFTR
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 3/7頁
文件大小: 0K
描述: IC VCXO/STB AUDIO CLOCK 16-TSSOP
標準包裝: 1
類型: 壓控晶體振蕩器(VCXO)
PLL: 帶旁路
輸入: 晶體
輸出: LVCMOS
電路數(shù): 1
比率 - 輸入:輸出: 1:2
差分 - 輸入:輸出: 無/無
頻率 - 最大: 27MHz
除法器/乘法器: 無/無
電源電壓: 3.15 V ~ 3.45 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 16-TSSOP
包裝: 標準包裝
產(chǎn)品目錄頁面: 1254 (CN2011-ZH PDF)
其它名稱: 800-1879-6
MK3722
VCXO PLUS AUDIO CLOCK FOR STB
VCXO AND SYNTHESIZER
IDT VCXO PLUS AUDIO CLOCK FOR STB
3
MK3722
REV G 051310
External Component Selection
The MK3722 requires a minimum number of external
components for proper operation.
Decoupling Capacitors
Decoupling capacitors of 0.01
F should be connected
between VDD and GND on pins 3 and 4, pins 6 and 7, and
pins 11 and 14 as close to the MK3722 as possible. For
optimum device performance, the decoupling capacitors
should be mounted on the component side of the PCB.
Avoid the use of vias in the decoupling circuit.
Series Termination Resistor
When the PCB traces between the clock outputs and the
loads are over 1 inch, series termination should be used. To
series terminate a 50
trace (a commonly used trace
impedance) place a 33
resistor in series with the clock line,
as close to the clock output pin as possible. The nominal
impedance of the clock output is 20
.
Quartz Crystal
The MK3722 VCXO function consists of the external crystal
and the integrated VCXO oscillator circuit. To assure the
best system performance (frequency pull range) and
reliability, a crystal device meeting IDT’ recommended
parameters must be used, and the layout guidelines
discussed in the following section must be followed.
See Application Note MAN05 for a full list of crystal
parameters.
The frequency of oscillation of a quartz crystal is determined
by its “cut” and by the load capacitors connected to it. The
MK3722 incorporates on-chip variable load capacitors that
“pull” (change) the frequency of the crystal. The crystal
specified for use with the MK3722 is designed to have zero
frequency error when the total of on-chip + stray
capacitance is 14pF.
The external crystal must be connected as close to the chip
as possible and should be on the same side of the PCB as
the MK3722. There should be no via’s between the crystal
pins and the X1 and X2 device pins. There should be no
signal traces underneath or close to the crystal.
Crystal Tuning Load Capacitors
The crystal traces should include pads for small fixed
capacitors, one between X1 and ground, and another
between X2 and ground. Stuffing of these capacitors on the
PCB is optional. The need for these capacitors is
determined at system prototype evaluation, and is
influenced by the particular crystal used (manufacture and
frequency) and by PCB layout. The typical required
capacitor value is 1 to 4 pF.
The procedure for determining the value of these capacitors
can be found in application note MAN05.
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