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參數(shù)資料
| 型號： | MK3732-10SLFTR |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 3/8頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC VCXO/MULTIPLIER 16-SOIC |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | PLL 時鐘合成器，VCXO |
| PLL： | 帶旁路 |
| 輸入： | 晶體 |
| 輸出： | CMOS |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:3 |
| 差分 - 輸入:輸出： | 無/無 |
| 頻率 - 最大： | 162MHz |
| 除法器/乘法器： | 是/是 |
| 電源電壓： | 3.15 V ~ 3.45 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC |
| 包裝： | 帶卷 (TR) |
MK3732-10
VCXO AND MULTIPLIER
IDT VCXO AND MULTIPLIER
3
MK3732-10
REV E 051310
Pin Descriptions
The MK3732-10 requires a minimum number of external
components for proper operation.
Decoupling Capacitors
Decoupling capacitors of 0.01
F should be connected
between VDD and GND on pins 2 and 5 and pins 3 and 6,
as close to the MK3732-10 as possible. For optimum device
performance, the decoupling capacitors should be mounted
on the component side of the PCB. Avoid the use of vias in
the decoupling circuit.
Series Termination Resistor
When the PCB traces between the clock outputs (CLK, pin
5) and the loads are over 1 inch, series termination should
be used. To series terminate a 50
trace (a commonly used
trace impedance) place a 33
resistor in series with the
clock line, as close to the clock output pin as possible. The
nominal impedance of the clock output is 20
.
Quartz Crystal
The MK3732-10 VCXO function consists of the external
crystal and the integrated VCXO oscillator circuit. To assure
the best system performance (frequency pull range) and
reliability, a crystal device with the recommended
parameters (shown below) must be used, and the layout
guidelines discussed in the following section must be
followed.
The frequency of oscillation of a quartz crystal is determined
by its “cut” and by the load capacitors connected to it. The
MK3732-10 incorporates on-chip variable load capacitors
that “pull” (change) the frequency of the crystal. The crystal
specified for use with the MK3732-10 is designed to have
zero frequency error when the total of on-chip + stray
capacitance is 14pF.
Recommended Crystal Parameters:
Initial Accuracy at 25
° C±20 ppm
Temperature Stability
±30 ppm
Pin
Number
Pin
Name
Pin
Type
Pin Description
1
XI
Crystal connection. Connect to a pullable of 16 to 28 MHz cyrstal.
2 - 3
VDD
Power
Connect to +3.3 V.
4
VIN
Input
Voltage input to VCXO. Zero to 3.3V signal which controls the VCXO frequency.
5 - 6
GND
Power
Connect to ground.
7
S3
Input
Select input #3. Selects outputs per table above. Internal pull-up resistor.
8
S2
Input
Select input #2. Selects outputs per table above. Internal pull-up resistor.
9PDCLK3
Input
Power down for CLK3.
10
S0
Input
Select input #0. Selects outputs per table above. Internal pull-up resistor.
11
CLK3
Output
PLL output clock that is either a multiple of the input or an audio clock. See table
above.
12
REF
Output
Buffered VCXO reference clock output. Matches crystal frequency.
13
REF/2
Output
Reference clock output divided by two.
14
S1
Input
Select input #1. Selects outputs per table above. Internal pull-up resistor.
15
OE
Input
Output enable. Tri-states outputs when low. Internal pull-up resistor.
16
X2
XO
Crystal connection. Connect to a pullable 16 to 28 MHz crystal.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MK3732-10STR | 功能描述:IC VCXO/MULTIPLIER 16-SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
| MK3732-17 | 制造商:ICS 制造商全稱:ICS 功能描述:ADSL VCXO CLOCK SOURCE |
| MK3732-17S | 功能描述:時鐘合成器/抖動清除器 ADSL VCXO CLOCK SOURCE RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| MK3732-17SI | 制造商:ICS 制造商全稱:ICS 功能描述:ADSL VCXO CLOCK SOURCE |
| MK3732-17SITR | 制造商:ICS 制造商全稱:ICS 功能描述:ADSL VCXO CLOCK SOURCE |
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