參數(shù)資料
型號: MK40N512VLL100R
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP100
封裝: 14 X 14 MM, LQFP-100
文件頁數(shù): 26/63頁
文件大?。?/td> 1735K
代理商: MK40N512VLL100R
The ADCx_DP2 and ADCx_DM2 ADC inputs are used as the PGA inputs and are not
direct device pins. Accuracy specifications for these pins are defined in Table 25 and
All other ADC channels meet the 13-bit differential/12-bit single-ended accuracy
specifications.
6.6.1.1 16-bit ADC operating conditions
Table 23. 16-bit ADC operating conditions
Symbol
Description
Conditions
Min.
Max.
Unit
Notes
VDDA
Supply voltage
Absolute
1.71
3.6
V
ΔVDDA
Supply voltage
Delta to VDD (VDD-
VDDA)
-100
0
+100
mV
ΔVSSA
Ground voltage
Delta to VSS (VSS-
VSSA)
-100
0
+100
mV
VREFH
ADC reference
voltage high
1.13
VDDA
V
VREFL
Reference
voltage low
VSSA
V
VADIN
Input voltage
VREFL
VREFH
V
CADIN
Input
capacitance
16 bit modes
8/10/12 bit
modes
8
4
10
5
pF
RADIN
Input resistance
2
5
RAS
Analog source
resistance
13/12 bit modes
fADCK < 4MHz
5
fADCK
ADC conversion
clock frequency
≤13 bit modes
1.0
18.0
MHz
fADCK
ADC conversion
clock frequency
16 bit modes
2.0
12.0
MHz
Crate
ADC conversion
rate
≤13
bit modes
No ADC hardware
averaging
Continuous
conversions enabled
Peripheral clock =
50MHz
18.484
818.330
Ksps
Table continues on the next page...
Peripheral operating requirements and behaviors
K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
32
Preliminary
Freescale Semiconductor, Inc.
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