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參數(shù)資料
| 型號(hào)： | MK74CB218RTR |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | CB SERIES, LOW SKEW CLOCK DRIVER, 16 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 封裝： | 0.150 INCH, MO-153, SSOP-28 |
| 文件頁(yè)數(shù)： | 5/7頁(yè) |
| 文件大?。?/td> | 255K |
| 代理商： | MK74CB218RTR |
MK74CB218
DUAL 1 TO 8 BUFFALO CLOCK DRIVER
FAN OUT BUFFER
IDT / ICS DUAL 1 TO 8 BUFFALO CLOCK DRIVER
5
MK74CB218
REV K 051310
AC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V ±10%
Notes:
1. Between any two A outputs, or any two B outputs, with equal loading.
2. Between any clock A output and any clock B output with INA connected to INB, and equal loading.
3. See discussion and graph of speed versus load.
Thermal Characteristics
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
Input Clock Frequency
FIN
Note 3
0
200
MHz
Propagation Delay, 3.3 V
With load = 15 pF
3
6
ns
Output Clock Rise Time
20% to 80%, CL=10 pF
1
2
ns
Output Clock Rise Time
VDD = 2.5 V, 20% to
80%, CL=10 pF
23
ns
Output Clock Fall Time
80% to 20%, CL=10 pF
1
2
ns
Output Clock Fall Time
VDD = 2.5 V, 80% to
20%, CL=10 pF
23
ns
Output Duty Cycle
VDD = 3.3 V or 2.5 V,
CL=10 pF
40
50
60
%
Output Clock Rising Edge Skew
At VDD/2, Note 1
100
250
ps
Output Clock A to B Skew
At VDD/2, Note 2
100
250
ps
Output Enable Time
OE high to output on
20
ns
Output Disable Time
OE low to tri-state
20
ns
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
Thermal Resistance Junction to
Ambient
θJA
Still air
100
° C/W
θJA
1 m/s air flow
80
° C/W
θJA
3 m/s air flow
67
° C/W
Thermal Resistance Junction to Case
θJC
60
° C/W
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