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參數(shù)資料
| 型號： | ML2004CP |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 運(yùn)動控制電子 |
| 英文描述： | Logarithmic Gain/Attenuator |
| 中文描述： | LOG OR ANTILOG AMPLIFIER, 0.0199 MHz BAND WIDTH, PDIP14 |
| 封裝： | PLASTIC, DIP-14 |
| 文件頁數(shù)： | 2/11頁 |
| 文件大?。?/td> | 88K |
| 代理商： | ML2004CP |
ML2003, ML2004
PRODUCT SPECIFICATION
2
REV. 1.1.1 3/19/01
Pin Description
Absolute Maximum Ratings
1
Name
C3
Function
In serial mode, pin is unused. In parallel mode, coarse gain select bit. Pin has internal pulldown
resistor to GND.
In serial mode, input latch clock which loads the data from the shift register into the latch.
In parallel mode, coarse gain select bit. Pin has internal pulldown resistor to GND.
In serial mode, serial data input that contains serial 9 bit data word which controls the gain
setting. In parallel mode, coarse gain select bit. Pin has internal pulldown resistor to GND.
In serial mode, output latch clock which loads the 9 bit data word back into the shift register from
the latch. In parallel mode, coarse gain select bit. Pin has internal pulldown resistor to GND.
Powerdown input
. When P
DN
= 1, device is in powerdown mode. When P
normal operation. Pin has internal pulldown resistor to GND.
In serial mode, pin is unused. In parallel mode, fine gain select bit. Pin has internal pulldown
resistor to GND.
In serial mode, shift register clock which shifts the serial data on SID into the shift register on
rising edges and out on SOD on falling edges. In parallel mode, fine gain select bit. Pin has
internal pulldown resistor to GND.
In serial mode, pin is unused. In parallel mode, fine gain select bit. Pin has internal pulldown
resistor to GND.
Digital ground
. 0 volts. All digital inputs and outputs are referenced to this ground.
Serial or parallel select input. When SER/PAR = 1, device is in serial mode.
When SER/PAR = 0, device is in parallel mode. Pin has internal pullup resistor to V
In serial mode, serial output data which is the output of the shift register. In parallel mode, fine
gain select bit. Pin has internal pulldown resistor to GND.
Analog input
.
Analog ground
. 0 volts. Analog input and output are referenced to this ground.
Negative supply
. –5 volts ±10%.
Analog output
.
Positive supply
. +5 volts ±10%.
In serial mode, pin is unused. In parallel mode, attenuation/gain select bit. Pin has internal
pulldown resistor to GND.
(LATI) C2
(SID) C1
(LATO) C0
P
DN
DN
= 0, device is in
F3
(SCK) F2
F1
GND
SER/PAR
CC
.
(SOD) F0
V
AGND
V
SS
V
OUT
V
CC
ATTEN/GAIN
IN
Parameter
Supply Voltage
V
CC
V
SS
AGND with respect to GND
Analog Input and Output
Digital Input and Outputs
Input Current Per Pin
Power Dissipation
Storage Temperature Range
Lead Temeperature (Soldering, 10 sec)
Min.
Max.
Units
+6.5
-6.5
±0.5
+0.3
+0.3
±25
750
+150
300
V
V
V
V
V
V
GND –0.3
SS
–0.3V
V
V
CC
CC
mA
mW
°C
°C
-65
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相關(guān)代理商/技術(shù)參數(shù) |
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| ML2004IP | 功能描述:衰減器 -IC Gain/attenuator Logarithmic RoHS:否 制造商:Skyworks Solutions, Inc. 最大衰減:18 dB 容差: 阻抗: 功率額定值:30 dBm 安裝風(fēng)格:SMD/SMT 工作溫度范圍:- 40 C to + 85 C |
| ML2008 | 制造商:MICRO-LINEAR 制造商全稱:MICRO-LINEAR 功能描述:レP Compatible Logarithmic Gain/Attenuator |
| ML2008CP | 制造商:MICRO-LINEAR 制造商全稱:MICRO-LINEAR 功能描述:レP Compatible Logarithmic Gain/Attenuator |
| ML2008CQ | 制造商:MICRO-LINEAR 制造商全稱:MICRO-LINEAR 功能描述:レP Compatible Logarithmic Gain/Attenuator |
| ML2008IP | 制造商:MICRO-LINEAR 制造商全稱:MICRO-LINEAR 功能描述:レP Compatible Logarithmic Gain/Attenuator |
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