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參數(shù)資料
| 型號： | ML2258CIQ |
| 英文描述： | レP Compatible 8-Bit A/D Converter with 8-Channel Multiplexer |
| 中文描述： | レP兼容的8位A / D轉(zhuǎn)換器8通道多路復(fù)用器 |
| 文件頁數(shù)： | 4/12頁 |
| 文件大?。?/td> | 169K |
| 代理商： | ML2258CIQ |
ML2258
4
ELECTRICAL CHARACTERISTICS
(Continued)
TYP
SYMBOL
PARAMETER
NOTES
CONDITIONS
MIN
(NOTE 4)
MAX
UNITS
AC and Dynamic Performance Characteristics (Note 10)
t
ACQ
f
CLK
t
C
SNR
Sample and Hold Acquisition
4
1/f
CLK
kHz
Clock Frequency
5
100
10240
Conversion Time
5
67
67 + 250ns
1/f
CLK
dB
Signal to Noise Ratio
V
IN
= 51kHz, 5V sine.
f
CLK
= 10.24MHz
(f
SAMPLING
> 150kHz). Noise is sum
of all nonfundamental components
up to 1/2 of f
SAMPLING
V
IN
= 51kHz, 5V sine.
f
CLK
= 10.24MHz
(f
SAMPLING
> 150kHz). THD is sum
of 2, 3, 4, 5 harmonics relative to
fundamental
47
THD
Total Harmonic Distortion
–60
dB
IMD
Intermodulation Distortion
V
IN
= f
A
+ f
B
. f
A
= 49kHz, 2.5V sine.
f
B
= 47.8kHz, 2.5V sine,
f
CLK
= 10.24MHz
(f
SAMPLING
> 150kHz). IMD is (f
A
+ f
B
),
(f
A
– f
B
), (2f
A
+ f
B
), (2f
A
– f
B
), (f
A
+ 2f
B
),
(f
A
– 2f
B
) relative to fundamental
V
IN
= 0 to 50kHz. 5V sine relative
to 1kHz
–60
dB
FR
Frequency Response
0.1
dB
t
DC
t
EOC
t
WS
t
SS
t
WALE
t
S
t
H
t
H1, H0
Clock Duty Cycle
6, 11
40
60
%
End of Conversion Delay
5
8
8 + 250ns
1/f
CLK
ns
Start Pulse Width
5
50
Start Pulse Setup Time
6, 12
Synchronous only
40
ns
Address Latch Enable Pulse Width
5
50
ns
Address Setup
5
0
ns
Address Hold
5
50
ns
Output Enable for DB0–DB7
6
Figure 1, C
L
= 50pF
Figure 1, C
L
= 10pF
Figure 1, C
L
= 50pF
Figure 1, C
L
= 10pF
100
ns
6
50
ns
t
1H, 0H
Output Disable for DB0–DB7
6
200
ns
6
100
ns
C
IN
C
OUT
Capacitance of Logic Input
5
pF
Capacitance of Logic Outputs
10
pF
Note 1:
Absolute maximum ratings are limits beyond which the life of the integrated circuit may be impaired. All voltages unless otherwise specified are measured with
respect to ground.
When the input voltage (V
IN
) at any pin exceeds the power supply rails (V
IN
< V– or V
IN
> V+) the absolute value of current at that pin should be limited to 25mA or less.
–40°C to +85°C operating temperature range devices are 100% tested with temperature limits guaranteed by 100% testing, sampling, or by correlation with worst-
case test conditions.
Typicals are parametric norm at 25°C.
Parameter guaranteed and 100% production tested.
Parameter guaranteed. Parameters not 100% tested are not in outgoing quality level calculation.
Total unadjusted error includes offset, full scale, linearity, multiplexer and sample and hold errors.
For –V
REF
V
IN
(+) the digital output code will be 0000 0000. Two on-chip diodes are tied to each analog input which will forward conduct for analog input voltages
one diode drop below ground or one diode drop greater than the V
CC
supply. Be careful, during testing at low V
CC
levels (4.5V), as high level analog inputs (5V) can
cause this input diode to conduct — especially at elevated temperatures, and cause errors for analog inputs near full scale. The spec allow 100mV forward bias of either
diode. This means that as long as the analog V
IN
or V
REF
does not exceed the supply voltage by more than 100mV, the output code will be correct. To achieve an
absolute 0V
DC
to 5V
DC
input voltage range will therefore require a minimum supply voltage of 4.900V
DC
over temperature variations, initial tolerance and loading.
Leakage current is measured with the clock not switching.
Note 10: C
L
= 50pF, timing measured at 50% point.
Note 11: A 40% to 60% clock duty cycle range insures proper operation at all clock frequencies. In the case that an available clock has a duty cycle outside of these limits,
the minimum time the clock is high or the minimum time the clock is low must be at least 40ns. The maximum time the clock can be high or low is 60μs.
Note 12: The conversion start setup time requirement only needs to be satisfied if a conversion must be synchronized to a given clock rising edge. If the setup time is not met,
start conversion will have an uncertainty of one clock pulse.
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
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| ML2259BCP | 制造商:MICRO-LINEAR 制造商全稱:MICRO-LINEAR 功能描述:レP Compatible 8-Bit A/D Converters with 2- or 8-Channel Multiplexer |
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