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參數(shù)資料
| 型號(hào)： | ML2283CIP |
| 元件分類： | 串行ADC |
| 英文描述： | Serial I/O 8-Bit A/D Converters |
| 中文描述： | 串行I / O 8位A / D轉(zhuǎn)換器 |
| 文件頁數(shù)： | 2/20頁 |
| 文件大?。?/td> | 357K |
| 代理商： | ML2283CIP |
ML2280, ML2283
2
PIN CONFIGURATION
NAME
FUNCTION
V
CC
DGND
Positive supply. 5V ± 10%
Digital ground. 0 volts. All digital inputs and
outputs are referenced to this point.
AGND
Analog ground. The negative reference voltage
for A/D converter.
GND
Combined analog and digital ground.
CH0,
V
IN
+, V
IN
– ended (V
IN
) or; V
IN
+ or V
IN
– of a differential
input. Analog range = GND - V
IN
- V
CC
.
V
REF/2
Reference. The analog input range is twice the
positive reference voltage value applied to this
pin.
Analog inputs. Digitally selected to be single
V+
Input to the Shunt Regulator.
DO
Data out. Digital output which contains result
of A/D conversion. The serial data is clocked
out on falling edges of CLK.
PIN DESCRIPTION
ML2280
Single Differential Input
8-Pin PDIP
ML2283
4-Channel MUX
14-Pin PDIP
NAME
FUNCTION
SARS
Successive approximation register status.
Digital output which indicates that a
conversion is in progress. When SARS goes
to 1, the sampling window is closed and
conversion begins. When SARS goes to 0,
conversion is completed. When
CS
= 1, SARS
is in high impedance state.
CLK
Clock. Digital input which clocks data in on
DI on rising edges and out on DO on falling
edges. Also used to generate clocks for A/D
conversion.
DI
Data input. Digital input which contains serial
data to program the MUX and channel
assignments.
CS
Chip select. Selects the chip for multiplexer
and channel assignment and A/D conversion.
When
CS
= 1, all digital outputs are in high
impedance state. When
CS
= 0, normal A/D
conversion takes place.
CS
V
IN
+
V
IN
–
GND
V
CC
CLK
DO
V
REF/2
1
2
3
4
8
7
6
5
TOP VIEW
TOP VIEW
V+
CS
CH0
CH1
CH2
CH3
DGND
V
CC
DI
CLK
SARS
DO
V
REF/2
AGND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
ML2280
Single Differential Input
8-Pin SOIC
TOP VIEW
CS
V
IN
+
V
IN
–
GND
V
CC
CLK
DO
V
REF/2
1
2
3
4
8
7
6
5
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