
ML4411/ML4411A
REV. 1.0 10/10/2000
5
maximum voltage at any PH input does not exceed VCC.
NEUTRAL
0
60
120
180
240
0
300
Figure 2. Typical motor phase waveform with Back-EMF
superimposed (Ideal Commutation)
VCO AND PHASE DETECTOR CALCULATIONS
The VCO should be set so that at the maximum frequency
of operation (the running speed of the motor) the VCO
control voltage will be no higher than VCC
MIN
– 1V. The
VCO maximum frequency will be:
F
POLES RPM
MAX
=
×
0 05
.
where POLES is the number of poles on the motor and
RPM is the maximum motor speed in Revolutions Per
FUNCTIONAL DESCRIPTION
The ML4411 provides closed-loop commutation for
3-phase brushless motors. To accomplish this task, a VCO,
integrating Back-EMF Sampling error amplifier and
sequencer form a phase-locked loop, locking the VCO to
the back-EMF of the motor. The IC also contains circuitry
to control motor current with either linear or constant off-
time PWM modes. Braking and power fail detection
functions are also provided on chip. The ML4411 is
designed to drive external power transistors (N-channel
sinking transistors and PNP sourcing transistors) directly.
Start-up sequencing and motor speed control are
accomplished by a microcontroller. Speed sensing is
accomplished by monitoring the output of the VCO,
which will be a signal which is phased-locked to the
commutation frequency of the motor.
BACK-EMF SENSING AND COMMUTATOR
The ML4411 contains a patented back-EMF sensing
circuit which samples the phase which is not energized
(Shaded area in figure 2) to determine whether to increase
or decrease the commutator (VCO) frequency. A late
commutation causes the error amplifier to charge the
filter (RC) on pin 20, increasing the VCO input while
early
commutation causes pin 20 discharge. Analog speed
control loops can use pin 20 as a speed feedback voltage.
The input impedance of the three PH inputs is about 8K
to GND. When operating with a higher voltage motor, the
PH inputs should be divided down in voltage so that the
FIGURE 1. BACK EMKF sensing block diagram
NEUTRAL
SIMULATOR
Φ
A +
Φ
B +
Φ
C
6
Φ
A
Φ
B
Φ
C
MULTIPLEXER
R
C1
C2
VCO
COMMUTATION
LOGIC
SIGN
CHANGER
b
a
–
+
I(PIN 21)
+
LOOP FILTER
I
RC
=
Va – Vb
8K
RC
VCO /TACH OUT
+
–
DIS PWR
8K
8K
ROTATION
SENSE