參數(shù)資料
型號: ML4800
廠商: Fairchild Semiconductor Corporation
元件分類: 基準(zhǔn)電壓源/電流源
英文描述: Power Factor Correction and PWM Controller Combo(功率因數(shù)校正器和PWM控制器組合芯片)
中文描述: 功率因數(shù)校正和PWM控制器組合(功率因數(shù)校正器和脈寬調(diào)制控制器組合芯片)
文件頁數(shù): 10/14頁
文件大小: 270K
代理商: ML4800
ML4800
FUNCTIONAL DESCRIPTION
(Continued)
Oscillator (RAMP 1)
The oscillator frequency is determined by the values of R
T
and C
T
, which determine the ramp and off-time of the
oscillator output clock:
f
t
t
OSC
RAMP
DEADTIME
=
+
1
(2)
The dead time of the oscillator is derived from the
following equation:
t
C
R
In
V
V
RAMP
T
T
REF
REF
=
×
×
125
375
.
.
(3)
at V
REF
= 7.5V:
t
C
R
RAMP
T
T
=
×
×
051
.
The dead time of the oscillator may be determined using:
t
V
mA
C
C
DEADTIME
T
T
=
×
=
×
25
55
.
450
.
(4)
The dead time is so small (tRAMP >> t
DEADTIME
) that the
operating frequency can typically be approximated by:
f
t
OSC
RAMP
=
1
(5)
EXAMPLE:
For the application circuit shown in the data sheet, with
the oscillator running at:
f
kHz
t
OSC
RAMP
=
=
100
1
Solving for R
T
x C
T
yields 1.96 x 10
-4
. Selecting standard
components values, C
T
= 390pF, and R
T
= 51.1k
W
.
The dead time of the oscillator adds to the Maximum
PWM Duty Cycle (it is an input to the Duty Cycle Limiter).
With zero oscillator dead time, the Maximum PWM Duty
Cycle is typically 45%. In many applications, care should
be taken that C
T
not be made so large as to extend the
Maximum Duty Cycle beyond 50%. This can be
accomplished by using a stable 390pF capacitor for C
T
.
PWM SECTION
Pulse Width Modulator
The PWM section of the ML4800 is straightforward, but
there are several points which should be noted. Foremost
among these is its inherent synchronization to the PFC
section of the device, from which it also derives its basic
timing. The PWM is capable of current-mode or voltage
mode operation. In current-mode applications, the PWM
ramp (RAMP 2) is usually derived directly from a current
sensing resistor or current transformer in the primary of the
output stage, and is thereby representative of the current
flowing in the converter’s output stage. DC I
LIMIT
, which
provides cycle-by-cycle current limiting, is typically
connected to RAMP 2 in such applications. For voltage-
mode operation or certain specialized applications, RAMP
2 can be connected to a separate RC timing network to
generate a voltage ramp against which V
DC
will be
compared. Under these conditions, the use of voltage
feedforward from the PFC buss can assist in line regulation
accuracy and response. As in current mode operation, the
DC I
LIMIT
input would is used for output stage overcurrent
protection.
No voltage error amplifier is included in the PWM stage of
the ML4800, as this function is generally performed on the
output side of the PWM’s isolation boundary. To facilitate
the design of optocoupler feedback circuitry, an offset has
been built into the PWM’s RAMP 2 input which allows
V
DC
to command a zero percent duty cycle for input
voltages below 1.25V.
PWM Current Limit
The DC I
LIMIT
pin is a direct input to the cycle-by-cycle
current limiter for the PWM section. Should the input
voltage at this pin ever exceed 1V, the output of the PWM
will be disabled until the output flip-flop is reset by the
clock pulse at the start of the next PWM power cycle.
V
IN
OK Comparator
The V
IN
OK comparator monitors the DC output of the
PFC and inhibits the PWM if this voltage on V
FB
is less
than its nominal 2.45V. Once this voltage reaches 2.45V,
which corresponds to the PFC output capacitor being
charged to its rated boost voltage, the soft-start begins.
PWM Control (RAMP 2)
When the PWM section is used in current mode, RAMP 2
is generally used as the sampling point for a voltage
representing the current in the primary of the PWM’s
output transformer, derived either by a current sensing
resistor or a current transformer. In voltage mode, it is the
input for a ramp voltage generated by a second set of
timing components (R
RAMP2
, C
RAMP2
), that will have a
minimum value of zero volts and should have a peak
value of approximately 5V. In voltage mode operation,
feedforward from the PFC output buss is an excellent way
to derive the timing ramp for the PWM stage.
Soft Start
Start-up of the PWM is controlled by the selection of the
external capacitor at SS. A current source of 25μA supplies
the charging current for the capacitor, and start-up of the
PWM begins at 1.25V. Start-up delay can be programmed
by the following equation:
10
REV. 1.0 10/10/2000
相關(guān)PDF資料
PDF描述
ML4801CP Variable Feedforward PFC/PWM Controller Combo
ML4801CS Variable Feedforward PFC/PWM Controller Combo
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ML4801 Variable Feedforward PFC/PWM Controller Combo(前饋可變PFC/PWM控制器組合芯片)
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ML4800CP 制造商:Fairchild Semiconductor Corporation 功能描述:IC PFC/PWM COMBO 4800 DIP16
ML4800CP_NL 功能描述:功率因數(shù)校正 IC Power Factor PWM Contrl 0.2mA 81KHz RoHS:否 制造商:Fairchild Semiconductor 開關(guān)頻率:300 KHz 最大功率耗散: 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Reel
ML4800CP_Q 功能描述:功率因數(shù)校正 IC PFC Controller PWM Combo RoHS:否 制造商:Fairchild Semiconductor 開關(guān)頻率:300 KHz 最大功率耗散: 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Reel