參數(shù)資料
型號(hào): ML4802CS
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 穩(wěn)壓器
英文描述: PFC/PWM Controller Combo with Green Mode
中文描述: 0.5 A POWER FACTOR CONTROLLER WITH POST REGULATOR, PDSO16
封裝: PLASTIC, SOIC-16
文件頁(yè)數(shù): 12/15頁(yè)
文件大小: 285K
代理商: ML4802CS
ML4802
12
REV. 1.0.1 12/12/2000
Figure 6. Leading/Trailing Edge Control Scheme
In the case of leading edge modulation, the switch is
turned OFF right at the leading edge of the system clock.
When the modulating ramp reaches the level of the error
amplifier output voltage, the switch will be turned ON.
The effective duty-cycle of the leading edge modulation
is determined during the OFF time of the switch. Figure 6
shows a leading edge control scheme.
One of the advantages of this control technique is that it
requires only one system clock. Switch 1 (SW1) turns off
and switch 2 (SW2) turns on at the same instant to
minimize the momentary “no-load” period, thus lowering
ripple voltage generated by the switching action. With
such synchronized switching, the ripple voltage of the
first stage is reduced. Calculation and evaluation have
shown that the 120Hz component of the PFC’s output
ripple voltage can be reduced by as much as 30% using
this method.
FUNCTIONAL DESCRIPTION
(Continued)
REF
EA
+
+
OSC
DFF
R
D
Q
Q
CLK
U1
RAMP
CLK
U4
U3
C1
RL
I4
SW2
SW1
+
DC
I1
I2
I3
VIN
L1
VEAO
CMP
U2
RAMP
VEAO
TIME
VSW1
TIME
TYPICAL APPLICATIONS
Figure 7 is the application circuit for a complete 100W
power factor corrected power supply, designed using the
methods and general topology detailed in Application
Note 33.
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