參數(shù)資料
型號: ML4802IP
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 穩(wěn)壓器
英文描述: PFC/PWM Controller Combo with Green Mode
中文描述: 0.5 A POWER FACTOR CONTROLLER WITH POST REGULATOR, PDIP16
封裝: PLASTIC, DIP-16
文件頁數(shù): 10/15頁
文件大?。?/td> 285K
代理商: ML4802IP
ML4802
10
REV. 1.0.1 12/12/2000
The major concern when compensating the ML4802's
voltage loop error amplifier is that the current amplifier
compensation is chosen to optimize frequency response
while maintaining good stability. This leads to the
following rules of thumb: the crossover frequency of the
current amplifier should be at least 10 times that of the
voltage amplifier to prevent interaction with the voltage
loop. It should also be limited to less than 1/6th that of
the switching frequency, e.g. 16.7kHz for a 100kHz
switching frequency.
For more information on compensating the current and
voltage control loops, see Application Notes 33, 34, and
55. Application Note 16 also contains valuable
information for the design of this class of PFC.
Oscillator
The oscillator frequency is determined by the values of RT
and CT, which determine the ramp and off-time of the
oscillator output clock:
The deadtime of the oscillator is derived from the
following equation:
at VREF = 7.5V:
The ramp of the oscillator may be determined using:
The deadtime is so small (tRAMP >> tDEADTIME) that the
operating frequency can typically be approximated by:
EXAMPLE:
For the application circuit shown in the data sheet, with
the oscillator running at:
Solving for RT x CT yields 1 x 10-4. Selecting standard
components values, CT = 100pF, and RT = 100k .
RAMP 1
The ramp voltage on this pin serves as a reference to
which the PFC control signal is compared in order to set
the duty cycle of the PFC switch. The external ramp
voltage is derived from an RC network similar to the
oscillator's. The PWM's oscillator sends a synchronous
pulse every other cycle to reset this ramp.
The ramp voltage should be limited to no more than the
output high voltage (6V) of the current error amplifier. The
timing resistor values should be selected such that the
capacitor will not charge past this point before being
reset. In order to ensure the linearity of the PFC loop's
transfer function and improve noise immunity, the
charging resistor should be connected to the 13.5V VCC
rather than the 7.5V reference. This will keep the charging
voltage across the timing capacitor in the "linear" region
of the charging curve.
The component value selection is similar to oscillator RC
component selection.
The charge time of RAMP 1 is derived from the following
equations:
At VCC = 13.5V and assuming RampPeak = 5V to allow
for component tolerances:
The capacitor value should remain small to keep the
discharge energy and the resulting discharge current
through the part small. A good value to use is the same
value used in the pwm timing circuit (CT).
For the application circuit shown in Figure 7, using a
200kHz PWM and a 100pF timing capacitor yeilds RT:
FUNCTIONAL DESCRIPTION
(Continued)
fOSC =
1
tRAMP+DEADTIME
tRAMP= CT
RT
INVREF-1.25
VREF-3.75
tRAMP= CT
RT
0.51
tDEADTIME=
2.5V
5.5mA
CT = 455 CT
fOSC=
1
tRAMP
fOSC=200kHz =
1
tRAMP
tRAMP=0.51 RT
CT =1 10
-5
Rt
1 10
100 10
0.463
5
12
-
=
-
Rt
215k
=
W
tCHARGE= .463 R
C
0
tCHARGE= C R
1n
VCC-RampValley
VCC-RampPeak
tCHARGE=
2
fOSC
fOSC=
1
tCHARGETIME+tDISCHARGETIME
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