參數(shù)資料
型號(hào): ML4812CQ
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 穩(wěn)壓器
英文描述: Power Factor Controller
中文描述: 1 A POWER FACTOR CONTROLLER, PQCC20
封裝: PLASTIC, LCC-20
文件頁(yè)數(shù): 2/16頁(yè)
文件大?。?/td> 348K
代理商: ML4812CQ
ML4812
2
REV. 1.0 10/10/2000
PIN CONFIGURATION
PIN
NAME
FUNCTION
1
I
SENSE
Input from the current sense
transformer to the non-inverting input
of the PWM comparator.
2
GM OUT
Output of gain modulator.
A resistor to ground on this pin
converts the current to a voltage.
This pin is clamped to 5V and tied
to the inverting input of the PWM
comparator.
3
EA OUT
Output of error amplifier.
4
EA–
Inverting input to error amplifier.
5
OVP
Input to over voltage comparator.
6
I
SINE
Current gain modulator input.
7
RAMP
COMP
Buffered output from the oscillator
ramp (C
T
). A resistor to ground sets the
current which is internally subtracted
from the product of I
SINE
and I
EA
in
the gain modulator.
PIN
NAME
FUNCTION
8
R
T
Oscillator timing resistor pin. A 5V
source sets a current in the external
resistor which is mirrored to charge
C
T
.
9
CLOCK
Digital clock output.
10
SHDN
A TTL compatible low level on this pin
turns off the output.
11
PWR GND
Return for the high current totem pole
output.
12
OUT
High current totem pole output.
13
V
CC
Positive Supply for the IC.
14
V
REF
Buffered output for the 5V voltage
reference.
15
GND
Analog signal ground.
16
C
T
Timing capacitor for the oscillator.
PIN DESCRIPTION
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
ISENSE
GM OUT
EA OUT
EA–
OVP
ISINE
RAMP COMP
RT
CT
GND
VREF
VCC
OUT
PWR GND
SHDN
CLOCK
TOP VIEW
ML4812
16-Pin PDIP (P16)
TOP VIEW
ML4812
20-Pin PLCC (Q20)
G
N
EA OUT
EA
NC
OVP
ISINE
VREF
VCC
NC
OUT
PWR GND
I
C
G
R
R
N
C
S
4
5
6
7
8
18
17
16
15
14
3
2
1 20 19
9 10 11 12 13
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