參數(shù)資料
型號: ML4825
廠商: Fairchild Semiconductor Corporation
英文描述: High Frequency PWM Controller(高頻PWM控制器)
中文描述: 高頻PWM控制器(高頻脈寬調(diào)制控制器)
文件頁數(shù): 6/9頁
文件大?。?/td> 108K
代理商: ML4825
ML4825
6
REV. 1.0 10/12/2000
Figure 6. Open Loop Frequency Response
A
FREQUENCY (Hz)
100
10k
10M
1k
100k
100M
1M
100
80
60
40
20
0
–20
0
0
–90
–180
AV
0
POWER V
C
OUT A
OUT B
POWER
GND
V
CC
13
11
14
12
Q2
Q1
3
2
1
0
V
IOUT (A)
0
1.5
1.0
0.5
SINK
SOURCE
Figure 7. Simplified Schematic
Figure 8. Saturation Curves
ERROR AMPLIFIER
The ML4825 error amplifier is a 5.5MHz bandwidth 12V/
μ
s
slew rate op-amp with provision for limiting the positive
output voltage swing (Output Inhibit line) for ease in
implementing the soft start function.
OUTPUT DRIVER STAGE
The ML4825 Output Driver is a 2A peak output high
speed totem pole circuit designed to quickly switch the
gates of capacitive loads, such as power MOSFET
transistors.
SOFT START AND CURRENT LIMIT
The ML4825 employs two current limits. When the
voltage at I
LIM
/SD exceeds 1V, the outputs are
immediately shut off and the cycle is terminated for the
remainder of the oscillator period by resetting the RS flip
flop.
If the output current is rising quickly such that the voltage
on I
LIM
/SD reaches 1.4V before the outputs have turned
off, a soft start cycle is initiated. The soft start capacitor is
discharged and outputs are held “off” until the voltage at
SS reaches 1V, ensuring a complete soft start cycle. The
duty cycle on start up is limited by limiting the output
voltage of the error amplifier voltage to the voltage at SS.
5
4
3
2
1
(
TIME (
μ
s)
0
0.2
0.6
1.0
0.8
0.4
V
OUT
V
IN
Figure 5. Unity Gain Slew Rate
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