參數(shù)資料
型號: ML4900
廠商: Fairchild Semiconductor Corporation
英文描述: High Current Synchronous Buck Controller For DC/DC conversion(用于DC/DC變換的大電流同步補償控制器(5V到2.1V~3.5V變換))
中文描述: 高電流同步降壓控制器,用于直流/直流轉換(用于直流/直流變換的大電流同步補償控制器(5V的到大于2.1V?3.5V的變換))
文件頁數(shù): 7/8頁
文件大?。?/td> 232K
代理商: ML4900
ML4900
7
PROTECT
VDD
N DRV H
N DRV L
PWR GND
COMP
ISENSE
VFB
ML4900
V
CC
P
V
SS
R1
5m
1W
12V
IN
5V
IN
4X
1800
μ
F
10V
L2
1.4
μ
H
R3
330k
C9
33pF
C8
220nF
16V
D0
D1
D2
D3
SHDN
PWR GOOD
VREF
GND
3X
1800
μ
F
10V
C11
22
μ
F
25V
C10
220nF
16V
R4
1k
C12
220nF
16V
C13
1
μ
F
16V
R5
100k
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
D1
BAW56
OUTEN
UP#
VID0
VID1
VID2
VID3
PWRGD
C4
C5
C6
C7
C3
C1
C2
Q1
Q2
and GND pins. At the same time, PWR GND must have a
low impedance connection to the ground plane used on
the board, as high instantaneous currents will flow in PWR
GND when N DRV L and N DRV H switch the capacitive
loads of the output MOSFET gates. A layout technique
which satisfies these requirements is to return PWR GND
to the grounded end of R1 using a high current Kelvin
connection. Figure 2 shows one successful
implementation of these PCB layout requirements.
I
SENSE
is an input to a medium-speed, high-sensitivity
comparator. It is often helpful to shield the trace running
from R1 to I
SENSE
with a “guard trace” connected to circuit
ground.
The compensation components R3 and C9 are high-
impedance nodes connected to the output of the voltage
loop error amplifier. These components should be kept in
close proximity to the ML4900. C9 should be returned to
GND, not to PWR GND or the ground plane of the PC
board. It may be helpful to shield the trace running from
R3 to COMP with a “guard trace” connected to circuit
ground.
Keep the V
REF
bypass capacitor C8 close to the ML4900.
Ensure that its ground connection is to GND, not PWR
GND or the ground plane of the PCB.
The V
DD
bypass capacitors C10 and C11 should be
returned to PWR GND or to the PC board ground plane.
They should not be returned to GND due to high transient
currents which could interfere with the current sensing
function.
In order to reduce circuit size, complexity, and cost, direct
drive of all N-channel power MOSFETs in the output stage
is employed, derived from the 12V input bus. This delivers
at least 10V of V
GS
enhancement to the MOSFET(s)
performing the synchronous rectification function. The
power switching MOSFET(s), however, have a worst-case
V
GS
enhancement of about 6V, and must therefore be
logic-level parts.
If a given design uses power MOSFETs in an 8 pin SOIC
package style, keep in mind that the thermal dissipation
capability of these parts is largely dictated by the copper
area available to their drains. A good layout will maximize
this area.
Figure 2. Kelvin Sense Connections
SENSE
RESISTOR
TO
ISENSE
TO
GND
TO
PWR GND
POWER GROUND RETURN
(GROUND PLANE)
TO
SYNCHRONOUS
RECTIFIER
MOSFET
SOURCE
Figure 1. Pentium Pro VRM Circuit
相關PDF資料
PDF描述
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