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參數(shù)資料
| 型號： | ML63514-XXXTP |
| 廠商： | OKI ELECTRIC INDUSTRY CO LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, MICROCONTROLLER, PQFP64 |
| 封裝： | 10 X 10 MM, 0.50 MM PITCH, PLASTIC, TQFP-64 |
| 文件頁數(shù)： | 2/30頁 |
| 文件大小： | 207K |
| 代理商： | ML63514-XXXTP |
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Semiconductor
ML63512/63514
10/29
Table 2 shows the secondary functions of each pin of the ML63512/63514.
Table 2 Pin Descriptions (Secondary Functions)
Function
Symbol
Type
Description
TB
TP
Pin
Capture
P1.0/TM0CAP
41
55
I
Timer 0 (TM0) capture trigger input pin.
P1.1/TM1CAP
42
56
I
Timer 1 (TM1) capture trigger input pin.
P1.0/TM0OVF
41
55
O
Timer 0 (TM0) overflow flag output pin.
P1.1/TM1OVF
42
56
O
Timer 1 (TM1) overflow flag output pin.
P1.2/T0CK
43
57
I
Timer 0 (TM0) external clock input pin.
P1.3/T1CK
44
58
I
Timer 1 (TM1) external clock input pin.
Timer
P2.0/TBCCLK
45
59
O
Low-speed oscillation clock output pin.
P2.1/HSCLK
46
60
O
High-speed oscillation clock output pin.
Oscillation
Output
P3.0/RXD
1
3
I
Serial port receive data input pin.
Sync serial port clock input-output pin.
Transmit sync clock input-output pin when a serial port is used
synchronously.
Transmit clock output when this device is used as a master processor.
Transmit clock input when this device is used as a slave processor.
P3.1/TXC
2
4
I/O
Sync serial port clock input-output pin.
Receive sync clock input-output pin when a serial port is used
synchronously.
Receive clock output when this device is used as a master processor.
Receive clock input when this device is used as a slave processor.
P3.2/RXC
3
5
I/O
P3.3/TXD
4
6
O
Serial port transmit data output pin.
Serial
Port
P7.0/CMPIN
13
19
I
Comparator analog input pin.
P7.1/CMPREF
14
20
I
Comparator reference voltage input pin.
Comparator
P7.2/LDIN0
15
21
I
Level detector analog input pin.
P7.3/LDIN1
16
22
I
Level detector analog input pin.
Level
Detector
P0.0/INT0
37
51
External 0 interrupt input pin.
Edge detection can be selected from one of a rising edge,
a falling edge, or both rising and falling edges.
I
P0.1/INT1
38
52
External 1 interrupt input pin.
Edge detection can be selected from one of a rising edge,
a falling edge, or both rising and falling edges.
P0.2/INT2
39
53
External 2 interrupt input pin.
Edge detection can be selected from one of a rising edge,
a falling edge, or both rising and falling edges.
P0.3/INT3
40
54
External
Interrupt
External 3 interrupt input pin.
Edge detection can be selected from one of a rising edge,
a falling edge, or both rising and falling edges.
I
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