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參數(shù)資料
| 型號(hào)： | ML6420CS-1 |
| 英文描述： | Triple/Dual Phase-Equalized, Low-Pass Video Filter |
| 中文描述： | 三/雙相均衡，低通視頻濾波器 |
| 文件頁(yè)數(shù)： | 7/20頁(yè) |
| 文件大?。?/td> | 271K |
| 代理商： | ML6420CS-1 |
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ML6420
7
APPLICATION GUIDELINES
OUTPUT CONSIDERATIONS
The triple filters have unity or 2X gain. The output circuit
has unity or 2X gain (0dB) when connected to a 150
W
load, and a –6dB gain when driving a 75
W
load via a 75
W
series output resistor. The output may be either AC or DC
coupled. For AC coupling (Figure 6), the –3dB point
should be 5Hz or less. There must also be a DC path of
￡
500
W
to ground for biasing.
The dual filters have 2X gain. The filter has 2X gain (6dB)
when connected to a 150
W
load, and a 0dB gain when
driving a 75
W
load via a 75
W
series output resistor. The
output may be either AC or DC coupled. For AC coupling,
the –3dB point should be 5Hz or less. There must also be a
DC path of
￡
500
W
to ground for output biasing.
INPUT CONSIDERATIONS
The input resistance is 4k
W
. The input may be either DC or
AC coupled. (Note that each input sources 80 to 125μA of
bias current).
LAYOUT CONSIDERATIONS
In order to obtain full performance from these triple filters,
layout is very important. Good high frequency decoupling
is required between each power supply and ground.
Otherwise, oscillations and/or excessive crosstalk may
occur. A ground plane is recommended.
Each filter has its own supply and ground pins. In the test
circuit, 0.1μF capacitors are connected in parallel with
0.001μF capacitors on pins V
CC
, V
CC
A, V
CC
B and V
CC
C for
maximum noise rejection (Figure 6A and Figure 1G).
Further noise reduction is achieved by using series ferrite
beads. In typical applications, this degree of bypassing
may not be necessary.
Since there are three filters in one 16-pin SOIC package,
space the signal leads away from each other as much
as possible.
POWER CONSIDERATIONS
The ML6420 power dissipation follows the formula:
1
6
–
P
I
V
V
R
D
CC
CC
OUT
L
=
×
×
2
3
This is a measure of the amount of current the part sinks
(current in — current out to the load).
Under worst case conditions:
0
P
mW
D
=
×
=
0175 55
.
15
75
3
8725
2
.
–
.
.
5
Power consumption can be reduced by not suppling V
CC
to unused filter sections. (V
CC
A, V
CC
B or V
CC
C)
TEST CIRCUITS
Figures 6A shows the test circuitn used for measuring the
frequency and group delay. It is expected that actual
customer circuits will be much simpler, since board
bypasses already exist and DC coupling or clamping will
be utilized at the inputs.
ML6420 VIDEO LOW PASS FILTER
Filter Selection:
The ML6420 provides several choices in
filter cut-off frequencies depending on
the application.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ML6420CS-3 | Triple/Dual Phase-Equalized, Low-Pass Video Filter |
| ML6421CS-1 | Triple Phase and Sinx/x Equalized, Low-Pass Video Filter |
| ML6421CS-3 | Triple Phase and Sinx/x Equalized, Low-Pass Video Filter |
| ML6426CS-1 | High Bandwidth Triple Video Filters with Buffered Outputs for RGB or YUV |
| ML6426CS-15 | High Bandwidth Triple Video Filters with Buffered Outputs for RGB or YUV |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ML6420CS1 WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| ML6420CS3 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| ML6420CS-3 | 制造商:MICRO-LINEAR 制造商全稱:MICRO-LINEAR 功能描述:Triple/Dual Phase-Equalized, Low-Pass Video Filter |
| ML6420CS3 WAF UP | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| ML6420CS-4 | 制造商:MICRO-LINEAR 制造商全稱:MICRO-LINEAR 功能描述:Triple/Dual Phase-Equalized, Low-Pass Video Filter |
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