參數(shù)資料
型號: ML6425
廠商: Fairchild Semiconductor Corporation
英文描述: CCIR601 Video Lowpass Filter with Optional Sinx/x Correction(可選Sinx/x校正器的CCIR601視頻低通濾波器)
中文描述: CCIR601視頻低通濾波器的任擇氮化硅/ x校正(可選氮化硅/ x校正器的CCIR601視頻低通濾波器)
文件頁數(shù): 3/14頁
文件大?。?/td> 185K
代理商: ML6425
ML6424/ML6425
3
Pin # Name
Description
1,3,
V
CC
Positive supply voltages
5,11
(4.75V to 5.25V).
2,10, GND
Ground voltages.
14
4
PULSE I/O
U/V clamp switch control input/output
pin. When MODE is low, U/V clamp
control pulse can be applied to this
input pin. When MODE is high, the
internal circuit generates a U/V clamp
control signal to produce an output
pulse at this pin. When MODE is
floating, do not apply any voltage to
this pin since it is internally tied low
in this case. (See table below)
6,7
V
IN
P,
Input to the filter. The input voltage for
V
IN
M
the filter is applied to V
IN
P pin with
respect to V
IN
M pin which is
grounded. (With no connection to
MODE pin, input signal range should
be from V
IN
= 0.5V to 1.5V when
RANGE = Low, V
IN
= 0V to 1V when
RANGE = High). There is a 100mA
internal current source connected to
each of these inputs.
8
RANGE
Input signal range control when
MODE is floating. When RANGE is
low, the input signal range is 0.5V to
1.5V, when RANGE is tied high the
input signal range is 0V to 1V.
9
R
EXT
Precision resistor to ground that
defines the cutoff frequency of the
filter. (Typical value = 10k
W
)
10% change in R
EXT
produces a 10%
change in f
C
(Fig. 28).
Pin # Name
Description
12
MODE
Input coupling mode control pin.
When MODE is low, U/V signal can
be applied through an external ac
coupling capacitor to V
IN
P. When
MODE is high, Y signal can be
applied through an external AC
coupling capacitor to V
IN
P. In this
case, an internal circuitry clamps the
sinc tip of the video input signal.
When MODE is set to mid supply or
left floating, input signal can be
directly applied to the input without
an AC coupling capacitor.
13
GAIN
Three state gain control pin. GAIN tied
low sets the input amplifier gain to 3/4
(0.75) and the output amplifier gain to
4/3 (1.333). When GAIN is tied high,
the input amplifier gain is 3/2 (1.5)
and the output amplifier gain is 4/3.
When GAIN is set to mid supply or left
to float, the input amplifier gain is 3/4
and the output gain is 8/3 (2.666).
(See table below)
15,16 V
OUT
P,
The output from the filter is derived
V
OUT
M
from the V
OUT
P pin with respect to
the V
OUT
M pin which is grounded
typically. It can drive 1V
PP
/75
W
(0.5V
to 1.5V) or 2V
PP
/150
W
(0.5V to 2.5V).
If the ouput common-mode level
needs to be increased, it can be done
by raising the potential of V
OUT
M. In
this case, the output is measured from
V
OUT
P with respect to GND.
PIN DESCRIPTION
Gain Table
Pulse Mode Table
MODE
INPUT COUPLING
PULSE
Low
AC for U/V
Input
Float
DC
Internally biased
High
AC for Y
Output
GAIN
SELECT
INPUT
INPUT
BUFFER
GAIN
OUTPUT
BUFFER
GAIN
OUTPUT OPTIMIZES
Low
1V
PP
0.75
1.333
1V
PP
Float
1V
PP
0.75
2.666
2V
PP
Differential
Phase
& Gain
High
1V
PP
1.50
1.333
2V
PP
Noise
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