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參數(shù)資料
| 型號： | ML65245 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | High Speed Octal Buffer Transceivers(高速八通道緩沖收發(fā)器) |
| 中文描述： | 八路高速緩沖收發(fā)器（高速八通道緩沖收發(fā)器） |
| 文件頁數(shù)： | 7/10頁 |
| 文件大?。?/td> | 109K |
| 代理商： | ML65245 |
ML65245
**
/ML65L245
*
REV. 1.0 10/25/2000
7
Figure 7. The ML65245 in a non-cache, main memory RISC application. The main memory could be DRAM or
Cache DRAM. The ML65245 can be used as a data I/O transceiver as well as an address buffer, as shown above.
66 MHz
Pentium Processor
CACHE
(SRAM)
ML65245 BUFFER
CONTROL
ADDRESS
PCMC
LATCH
CONTROL
ADDRESS/DATA
WE
MAddr
LBX
BMAddr
BWE
DATA
LBX CNTL
PCI BUS (33 MHz)
MAIN MEMORY
(DRAM)
CNTL
DATA
LOCAL BUS
R4X00
150/75 MHz
CDRAM
or
DRAM
CDRAM
or
DRAM
MEMORY I/O
CONTROLLER
ML65245
CONTROL
ADDR
CONTROL
ADDRESS/DATA
ML65245
ML65245
Figure 6. ML65245 in a main memory application for a Pentium based system. The high drive and low propagation
delay are essential to buffer the write enable and memory addresses to the main memory SIIMMs.
相關PDF資料 |
PDF描述 |
|---|---|
| ML65L245 | High Speed Octal Buffer Transceivers(高速八通道緩沖收發(fā)器) |
| ML6553CS-1 | ; Leaded Process Compatible:Yes RoHS Compliant: Yes |
| ML6553 | Bus Termination Regulator |
| ML65541 | High Speed Octal Buffer/Line Drivers(高速八通道緩沖收發(fā)器) |
| ML65L541 | High Speed Octal Buffer/Line Drivers(高速八通道緩沖收發(fā)器) |
相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ML65245CK | 制造商:MICRO-LINEAR 制造商全稱:MICRO-LINEAR 功能描述:High Speed Octal Buffer Transceivers |
| ML65245CS | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| ML6553 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Bus Termination Regulator |
| ML6553CS1 | 功能描述:開關變換器、穩(wěn)壓器與控制器 Bus Termination RoHS:否 制造商:Texas Instruments 輸出電壓:1.2 V to 10 V 輸出電流:300 mA 輸出功率: 輸入電壓:3 V to 17 V 開關頻率:1 MHz 工作溫度范圍: 安裝風格:SMD/SMT 封裝 / 箱體:WSON-8 封裝:Reel |
| ML6553CS-1 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Bus Termination Regulator |
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