參數(shù)資料
型號(hào)： ML67Q4002TC
廠商： OKI ELECTRIC INDUSTRY CO LTD
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 33.333 MHz, RISC MICROCONTROLLER, PQFP144
封裝： 20 X 20 MM, 0.50 MM PITCH, PLASTIC, LQFP-144
文件頁(yè)數(shù)： 4/19頁(yè)
文件大小： 645K
代理商： ML67Q4002TC
ML674001/ML67Q4002/ML67Q4003
12 Oki Semiconductor
April 2004, Rev 2.0
Pin Descriptions
Pin Name
I/O
Description
Primary/
Secondary
Logic
System
RESET_N
I
Reset input
–Negative
BSEL[1:0]
I
Boot device select signal
The selected device is mapped to BANK0 (0x0000_0000 - 0x07FF_FFFF) after reset.
–Positive
OSC0
I
Crystal oscillator connection or external clock input.
If used, connect a crystal oscillator (16 MHz to 33 MHz) to OSC0 and OSC1_N.
It is also possible to input a direct clock.
–
OSC1_N
O
Oscillation output pin
When not using a crystal oscillator, leave this pin unconnected.
–
CKO
O
Clock out
––
CKOE_N
I
Clock out enable
–
Negative
JTAG Interface
TCK
I
Debugging pin. Normally connect to ground level.
–
TMS
I
Debugging pin. Normally drive at High level.
–
Positive
nTRST
I
Debugging pin. Normally connect to ground level.
–
Negative
TDI
I
Debugging pin. Normally drive at High level.
–
Positive
TDO
O
Debugging pin. Normally leave open.
–
Positive
General-purpose I/O ports
PIOA[7:0]
I/O
General-purpose port.
Not available for use as port pins when secondary functions are in use.
Primary
Positive
PIOB[7:0]
I/O
General-purpose port.
Not available for use as port pins when secondary functions are in use.
Primary
Positive
PIOC[7:0]
I/O
General-purpose port.
Not available for use as port pins when secondary functions are in use.
Primary
Positive
PIOD[7:0]
I/O
General-purpose port.
Not available for use as port pins when secondary functions are in use.
Note that enabling the DRAM controller by asserting the DRAMEN input permanently con-
gures PIOD[7:0] for their secondary functions, making them unavailable for use as port
pins.
Primary
Positive
PIOE[9:0]
I/O
General-purpose port. Not available for use as port pins when secondary functions are in
use.
Primary
Positive
External Bus
XA[23:19]
O
Address bus to external RAM, external ROM, external I/O banks, and external DRAM.After
a reset, these pins are congured for their primary function PIOC[6:2].
Secondary
Positive
XA[18:0]
O
Address bus to external RAM, external ROM, external I/O banks, and external DRAM.
–
Positive
XD[15:0]
I/O
Data bus to external RAM, external ROM, external I/O banks, and external DRAM.
–
Positive
External bus control signals (ROM/SRAM/IO)
XROMCS_N
O
ROM bank chip select
–
Negative
XRAMCS_N
O
SRAM bank chip select
–
Negative
XIOCS_N[0]
O
I/O chip select 0
–
Negative
XIOCS_N[1]
O
I/O chip select 1
–
Negative
XIOCS_N[2]
O
I/O chip select 2
–
Negative
XIOCS_N[3]
O
I/O chip select 3
–
Negative
BSEL[1]
BSEL[0]
Boot device
LL
Internal Flash (External ROM for ML674001)
LH
External ROM
H*
Boot ROM (* = don’t care)
相關(guān)PDF資料
PDF描述
ML67Q4002LA 32-BIT, FLASH, 33.333 MHz, RISC MICROCONTROLLER, PBGA144
ML674001LA 32-BIT, MROM, 33.333 MHz, RISC MICROCONTROLLER, PBGA144
ML67Q4051TC RISC MICROCONTROLLER, PQFP144
ML67Q4060TB RISC MICROCONTROLLER, PQFP64
ML67Q4050TC RISC MICROCONTROLLER, PQFP144
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ML67Q4003 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:32-bit ARM-Based General-Purpose Microcontroller
ML67Q4003-1NNNTCZ03A 制造商:OKI Semiconductor 功能描述:OKIML67Q4003-1NNNTCZ03A 32-bit ARM Micro 制造商:ROHM Semiconductor 功能描述:RHOML67Q4003-1NNNTCZ03A ML67Q4003-1NNNTC
ML67Q4003LA 制造商:ROHM Semiconductor 功能描述:
ML67Q4003TC 制造商:ROHM Semiconductor 功能描述:
ML67Q4050-1NNNTCZG3A 功能描述:ARM微控制器 - MCU 16/32-BIT ARM7TDMI 64KB FLASH 16KB RAM RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT
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