參數(shù)資料
型號: ML67Q4003LA
廠商: LAPIS SEMICONDUCTOR CO LTD
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 33.333 MHz, RISC MICROCONTROLLER, PBGA144
封裝: 11 X 11 MM, 0.80 MM PITCH, PLASTIC, LFBGA-144
文件頁數(shù): 7/25頁
文件大?。?/td> 229K
代理商: ML67Q4003LA
FEDL674001-01
OKI Semiconductor
ML674001/67Q4002/67Q4003
14/24
DESCRIPTION OF FUNCTIONS
CPU
CPU core:
ARM7TDMI
Operating frequency:
1 MHz to 33 MHz
Byte ordering:
Little endian
Instructions:
ARM instruction (32-bit length) and Thumb instruction (16-bit length) can be mixed.
General register bank:
31
× 32 bits
Built-in barrel shifter:
ALU and barrel shift operations can be executed by one instruction.
Multiplier:
32 bits
× 8 bits (Modified Booth’s Algorithm)
Built-in debug function:
JTAG interface, break point register
Built-in Memory
FLASH ROM:
ML674001 :
ROM-less version
ML67Q4002 : 256Kbytes (128K x 16 bits)
ML67Q4003 : 512Kbytes (256K x 16 bits)
Access timing of this FLASH memory is configured by the ROM bank control register
of the external memory controller.
RAM:
32KB (8K x 32bits)
Read access(8/16/32bit): 1 cycle,
Write access(32bit): 1 cycle,
Write aceess(8/16bit): 2 cycle,
Interrupt Controller
Fast interrupt request (FIQ) and interrupt request (IRQ) are employed as interrupt input signals. The interrupt
controller controls these interrupt signals going to ARM core.
(1)
Interrupt sources
FIQ: 1 external source (external pin: EFIQ_N)
IRQ: total of 27 sources.
23 internal sources, and 4 external sources (external pins: EXINT[3:0])
(2)
Interrupt priority level
Configurable, 8-level priority for each source
(3)
External interrupt pin input
EXINT[3:0] can be set as Level or Edge sensing.
Configurable High or Low when Level sensing.
Configurable Rise or Falling edge triggering when Edge
sensing.
EFIQ_N is set as Falling edge triggering.
Timers
7 channels of 16-bit reload timers are employed. Of these, 1 channel is used as system timer for OS.
The timers of other 6 channels are used in application software.
(1)
System timer: 1 channel
16-bit auto reload timer: Used as system timer for OS.
Interrupt request by timer overflow.
(2)
Application timer: 6 channels
16-bit auto reload timer.
Interrupt request by compare match.
One shot, interval
Clock can be independently set for each channel
相關(guān)PDF資料
PDF描述
ML67Q4002LA 32-BIT, FLASH, 33.333 MHz, RISC MICROCONTROLLER, PBGA144
ML67Q4003TC 32-BIT, FLASH, 33.333 MHz, RISC MICROCONTROLLER, PQFP144
ML67Q4002TC 32-BIT, FLASH, 33.333 MHz, RISC MICROCONTROLLER, PQFP144
ML69Q6500 32-BIT, FLASH, 120 MHz, RISC MICROCONTROLLER, PBGA272
ML696500 32-BIT, 120 MHz, RISC MICROCONTROLLER, PBGA272
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