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參數(shù)資料
| 型號(hào)： | ML696500 |
| 廠商： | LAPIS SEMICONDUCTOR CO LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 120 MHz, RISC MICROCONTROLLER, PBGA272 |
| 封裝： | 15 X 15 MM, 0.65 MM PITCH, PLASTIC, LFBGA-272 |
| 文件頁(yè)數(shù)： | 12/18頁(yè) |
| 文件大小： | 284K |
| 代理商： | ML696500 |
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Oki Semiconductor 3
ML696500 and ML69Q6500
January 2005, Rev 1.1b
Preliminary
Functional Description
CPU
- 32-bit RISC CPU (ARM946E)
- Built-in 8-KB instruction cache and 8-KB data cache
- Little-endian format
- Maximum operating frequency of 120 MHz
- Instruction structure – Highly dense 32-bit ARM instructions and a subset
16-bit Thumb instructions with high object code efciency
- 31 General-purpose registers x 32 bits
- Built-in barrel shifter – The operations of the ALU and barrel shift can be
executed by one instruction.
- Built-in multiplier (32 bits x 16 bits)
- Built-in debug function (JTAG)
Internal memory
- Built-in 128-KB SRAM (32 KWords x 32 bits)
- AHB bus connection
- Built-in 16-KB ROM for boot up (4 KWords x 32 bits)
- 512-KB Flash ROM(ML69Q6500 only)
External memory and I/O controller (16-bit devices)
- ROM (Flash) access function
- SRAM access function
- SDRAM access function – supports distributed CBR
- External I/O interface – two 16-bit banks
Interrupt controller / extended-interrupt controller
- FIQ: Used for an internal interrupt (IFIQ_N) from the AUDIO module.
- 27 IRQ sources (23 internal sources and 4 external sources)
- Seven interrupt priority levels can be set for each interrupt source
PLAT system timer
- 16-bit auto reload timer x 1 channel
PLAT-SIO (UART)
- Full-duplex start-stop synchronization method
- Built-in baud-rate generator
DMA controller
- Four channels
- Fixed mode or round-robin mode priority can be selected
- Cycle-steal mode or burst-mode bus access privilege can be selected
- Software requests and external requests are supported as DMA transfer
requests
- Maximum transfer count is 65,536 (64K)
- Data transfer sizes are 8, 16, or 32 bits
High speed USB Port
- USB 2.0 standard compliant
- High-speed (480 Mbps)
- Interface to AMBA high-speed bus
IDE Controller
- ATA66 compliant
- DMA and Ultra DMA are supported.
- Switchable to NAND Flash + GPIO using the IDEMODE pin
PWM
- PWM x 1 channel (16-bit resolution)
Watchdog timer
- 16-bit timer
- Interval-mode or watchdog-mode can be selected
- An interrupt or a reset can be generated
Analog-to-digital converter
- 10-bit successive approximation type x 4 channels
- Sample / hold function
- Shortest conversion time is 6.7 s
I2C Bus Controller
-I2C bus standard compliant controller x 1 channel
- Operates only as I2C bus master device
- Communication speed is 100-400 kbps
- Supports 7-bit and 10-bit addressing
Timer
- 16-bit auto reload timer x 3 channels
- A different clock can be set for each channel.
- One-shot mode or interval mode can be set for each channel.
Synchronous Serial I/O (SSIO)
- 3 channels of 8-bit clock synchronous serial port
- One-of-3 channels is used to control built-in audio Codec
- Congurable Clock polarity
- Select LSB rst or MSB rst
- Select Master or Slave mode
Universal Registers
- Four 8-bit general-purpose internal status/setup registers
NAND Flash memory controller
- SmartMedia Standard 2000 compliant (512-Bytes/sector)
- Supports SmartMedia of 8 MB to 128 MB
- Built-in ECC circuit
- 512-Byte/2048-Byte auto write/read function
RTC
- 1-second clock generation function from 32.768 kHz
- Built-in 32-bit 1-second clock counter
- 32-bit compare interrupt function
GPIO
- Built-in GPIO of 16 pin x 5 channels (GPIOA, GPIOB, GPIOC, GPIOD,
GPIOE) and 8 pin x 1 channel (GPIOF)
- Each port congurable at bit level
- Interrupt inputs can be set at bit level
- GPIOA[15:00], GPIOB[15:00] and GPIOC[15:00] can be set to an exter-
nal bus by setting the EXTBUS pin
- GPIOD[15:00] can be used to select a secondary function in units of bits.
- GPIOE[15:11] can be used as external interrupts.
- GPIOE[15] is 5-V tolerant input
- GPIOF[06:00] function as IDE data, when the IDE controller mode is set
using the IDEMODE pin.
- GPIOF[7] is used as a control input to the internal audio Codec
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