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參數(shù)資料
| 型號(hào)： | ML9060 |
| 廠(chǎng)商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | 1/2 DUTY, 160-OUTPUT STATIC LCD DRIVER |
| 中文描述： | 1 / 2稅，160輸出靜態(tài)LCD驅(qū)動(dòng) |
| 文件頁(yè)數(shù)： | 6/18頁(yè) |
| 文件大?。?/td> | 156K |
| 代理商： | ML9060 |
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ML9060
Semiconductor
6/17
* : The specifications of the internal Rf clock frequency and the external Rf clock frequency will
be determined finally at the end of sample evaluations.
Switching Characteristics
Parameter
Symbol
Condition
Min. Typ. Max. Unit
Applicable pin
f
CP1
—
—
25.6
kHz
OSC IN Clock frequency
(external input)
Clock pulse width
(external input)
The clock is input to the
OSC1 pin. The pins OSC2
and OSCR are left open.
OSC I/E = "L"
An Rf of 120k
W
±
2% is
connected between OSC1
and OSC2. OSCR is left
open. OSC I/E = 'H"
OSC1 open. OSC2 and
OSCR shorted. OSC I/E
tied to V
DD
or any "H" level.
OSC1
(V
DD
= 2.7 to 5.5V, V
LCD
= 4.5 to 16V, Ta = –40 to +85
°
C)
t
WCP1
50
—
—
μ
s
OSC1
f
OSC1
7.7
12.8 20.5
kHz
External Rf clock
frequency
(internal oscillations)
OSC1, OSC2
f
OSC2
7.7
12.8 20.5
kHz
Internal Rf clock frequency
(with the built-in oscillator)
OSC1, OSCR,
OSC2
f
CP2
—
—
1
MHz
Data clock frequency
Data clock pulse width
CLOCK IN
t
WCP2
100
—
—
ns
CLOCK IN
t
SU
50
—
—
ns
Data setup time
DATA IN
t
HD
50
—
—
ns
Data hold time
CLOCK to LOAD
Period
LOAD to CLOCK
Period
LOAD Pulse width
CLOCK IN to
DATA OUT delay time
CLOCK IN
t
CL
100
—
—
ns
CLOCK IN
t
LC
100
—
—
ns
LOAD IN
t
WLD
t
PLH
t
PHL
100
—
—
ns
LOAD IN
CLOCK IN
DATA OUT
CLOCK IN/OUT
LOAD IN/OUT
SEG-TEST IN/OUT
BLANK IN/OUT
COM OUT
SYNC
All inputs other than
the OSCR input
—
—
50
ns
C
L
=15pF
t
DIO
—
—
20
ns
IN to OUT delay time
No load
t
DCS
—
—
40
ns
COM OUT to SYNC
delay time
Input signal rise time
Input signal fall time
C
L
=15pF
t
R
t
F
—
—
—
—
50
50
ns
ns
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