參數(shù)資料
型號(hào)： ML9205-01
廠商： OKI SEMICONDUCTOR CO., LTD.
英文描述： 5 x 7 Dot Character x 16-Digit Display Controller/Driver with Character RAM
中文描述： 5 × 7點(diǎn)陣字符× 16位數(shù)字顯示控制器/驅(qū)動(dòng)器的字符內(nèi)存
文件頁(yè)數(shù)： 15/34頁(yè)
文件大?。?/td> 355K
代理商： ML9205-01
Semiconductor
ML9205-01
15/34
FEDL9205-02
Data Transfer Method and Command Write Method
Display control command and data are written by an 8-bit serial transfer.
Write timing is shown in the figure below.
Setting the
CS
pin to "Low" level enables a data transfer.
Data is 8 bits and is sequentially input into the DA pin from LSB (LSB first).
As shown in the figure below, data is read by the shift register at the rising edge of the shift clock,
which is input into the
CP
pin. If 8-bit data is input, internal load signals are automatically
generated and data is written to each register and RAM.
Therefore it is not necessary to input load signals from the outside.
Setting the
CS
pin to "High" disables data transfer. Data input from the point when the
CS
pin
changes from "High" to "Low" is recognized in 8-bit units.
*
When data is written to RAM (DCRAM, ADRAM, CGRAM) continuously, addresses are
internally incremented automatically.
Therefore it is not necessary to specify the 1st byte to write RAM data for the 2nd and later
bytes.
Reset Function
Reset is executed when the
RESET
pin is set to "L", (when turning power on, for example) and
initializes all functions.
Initial status is as follows:
Address of each RAM.................. address "00"H
Data of each RAM ........................ All contents are undefined
General output port ..................... All general output ports go "Low"
Display digit.................................. 24 digits
Brightness adjustment ................. 8/16
All display lights ON or OFF ..... OFF mode
Segment output ............................ All segment outputs go "Low"
AD output ..................................... All AD outputs go "Low"
Please set the functions again according to "Setting Flowchart" after reset.
t
DOFF
B0
LSB
CS
CP
DA
B1 B2 B3 B4 B5 B6 B7
B0 B1 B2 B3 B4 B5 B6 B7
MSB
1st byte
LSB
MSB
2nd byte
When data is written to DCRAM*
Command and address data
t
CSH
B0 B1 B2 B3 B4 B5 B6 B7
LSB
MSB
2nd byte
Character code data of the
next address
Character code data
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