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參數(shù)資料
| 型號： | MLS9037-00110 |
| 英文描述： | MB 5C 5#16 PIN PLUG |
| 中文描述： | 表面貼裝頻率合成器和IF 109 - 111兆赫 |
| 文件頁數(shù)： | 1/2頁 |
| 文件大小： | 80K |
| 代理商： | MLS9037-00110 |
Surface Mount Frequency Synthesizer
MLS9037-00110
MLS9037-00110
M/A-COM Division of AMP Incorporated
I
North America: Tel. (800) 366-2266, Fax (800) 618-8883
I
Asia/Pacific: Tel.+85 2 2111 8088,
Fax +85 2 2111 8087
I
Europe: Tel. +44 (1344) 869 595, Fax+44 (1344) 300 020
www.macom.com
AMP and Connecting at a Higher Level are trademarks.
Specifications subject to change without notice.
V2.00
TYP.in 5 POSITIONS
13.2
1.0
1
0.2
2.0
7
8
11
12
10
9
6
4
3
2
1
DATE CODE
PART NO.
M/ A- COM LTD
IDENT
DETAIL A
0.6
0.8
5
DETAIL A
Features
Integrated VCO/PLL
Miniature SMT Package
Low Phase Noise
+5V Operation
Description
The MLS9037-00110 synthesizer design integrates a high perfor-
mance buffered VCO, PLL circuit and discrete loop filter in a
surface mount package. The SMT packaging provides electrical
shielding, easy PCB assembly and repeatable performance. The
synthesizer is designed for use in CDMA base stations and is
optimised for 115 MHz IF at the cellular Tx frequency with 20 kHz,
step size and low phase noise.
M/A-COM synthesizers are manufactured in an ISO 9001 certi-
fied facility, incorporating surface mount assembly and automated
electrical testing. This ensures consistent electrical performance
and quality over volume production quantities.
12 Lead Package
5. See plot for typical full band switching time measured to within
other offsets from final frequency.
6. Integral PLL lock monitor output, TTL high locked, TTL low
unlocked.
7. Device designed for loop bandwidth of 150 Hz.
8. Reference frequency input impedance 10 k
min.
1. All specification limits are indicated values and apply over F
OUT
and
for 50
load impedance.
2. Programming control is 3 wire serial CMOS or TTL levels, in accor-
dance with National Semiconductor LMX 1511.
3. Output power window includes variation over operating temperature
range (T
) -40°C to +85°C and output frequency range (F
OUT
).
4. See plot for typical phase noise at other frequency offsets.
Surface Mount Frequency Synthesizer
IF 109 - 111 MHz
Electrical Specifications
Parameter
Frequency Range (F
OUT
)
2
RF Output Power (P
OUT
)
3
Harmonic Output
Spurious Output
1
, T
A
= +25°C, V
CC
= +5V ,
F = 20 kHz, F
R
= 15 MHz
(unless otherwise stated)
Test Conditions
Units
Over T
OP
Over T
OP
—
Phase comparison frequency (F
OUT
±
F)
Reference breakthrough (F
OUT
±
F
R
)
SSB at 100 Hz offset from carrier
dBc/Hz
SSB at 1 kHz offset from carrier
dBc/Hz
SSB at 10 kHz offset from carrier
dBc/Hz
SSB at 100 kHz offset from carrier
dBc/Hz
300 Hz to 3 kHz bandwidth
mrad rms
Over F
OUT
, measured to within ± 500 Hz
—
—
Recommended operating limit
Recommended operating limit
Recommended operating limit
0.5 to 2.0 Vpp sine wave into a.c. coupled
CMOS. Recommended operating limit
Min.
109
-3.0
—
—
—
—
—
—
—
—
—
—
—
+4.75
+4.75
—
3
Typ.
—
—
-35
-85
-95
-73
-92
-112
-134
4
30
15
7
—
—
20
—
Max.
111
+3.0
-20
-70
—
—
-85
-107
—
9
—
20
10
+5.25
+5.25
—
20
MHz
dBm
dBc
dBc
dBc
Phase Noise
4
Integrated Phase Noise
Frequency Switching Time
5,6
VCO Supply Current (I
CC1
)
PLL Supply Current (I
CC2
)
VCO Supply Voltage (V
CC1
)
PLL Supply Voltage (V
CC2
)
Step Size (
F)
7
Reference Frequency (F
R
)
8
ms
mA
mA
V
V
kHz
MHz
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