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參數(shù)資料
| 型號： | MLT04 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Four-Channel, Four-Quadrant Analog Multiplier |
| 中文描述： | 四通道，四象限模擬乘法器 |
| 文件頁數(shù)： | 10/12頁 |
| 文件大小： | 428K |
| 代理商： | MLT04 |
–10–
REV. B
APPLIC AT IONS
T he MLT 04 is well suited for such applications as modulation/
demodulation, automatic gain control, power measurement, analog
computation, voltage-controlled amplifiers, frequency doublers,
and geometry correction in CRT displays.
Multiplier Connections
Figure 43 llustrates the basic connections for multiplication. Each
of the four independent multipliers has single-ended voltage inputs
(X , Y) and a low impedance voltage output (W). Also, each
multiplier has its own dedicated ground connection (GND) which
is connected to the circuit’s analog common. For best perfor-
mance, circuit layout should be compact with short component
leads and well-bypassed supply voltage feeds. In applications where
fewer than four multipliers are used, all unused analog inputs must
be returned to the analog common.
Figure 43. Basic Multiplier Connections
Squaring and Frequency Doubling
As shown in Figure 44, squaring of an input signal, V
, is achieved
by connecting the X -and Y-inputs in parallel to produce an output
of V
will be positive.
2
/2.5 V. T he input may have either polarity, but the output
Figure 44. Connections for Squaring
When the input is a sine wave given by V
sin
ω
t, the squaring
circuit behaves as a frequency doubler because of the trigonometric
identity:
(
V
IN
sin
ω
t
)
2
2.5
V
=
V
IN
2.5
V
2
1
2
(1
cos2
ω
t
)
T he equation shows a dc term at the output which will vary
strongly with the amplitude of the input, V
. T he output dc offset
can be eliminated by capacitively coupling the MLT 04’s output
with a high-pass filter. For optimal spectral performance, the
filter’s cutoff frequency should be chosen to eliminate the input
fundamental frequency.
A source of error in this configuration is the offset voltages of the X
and Y inputs. T he input offset voltages produce cross products
with the input signal to distort the output waveform. T o circum-
vent this problem, Figure 45 illustrates the use of inverting
amplifiers configured with an OP285 to provide a means by which
the X - and Y-input offsets can be trimmed.
Figure 45. Frequency Doubler with Input Offset Voltage
Trims
Feedback Divider Connections
T he most commonly used analog divider circuit is the “inverted
multiplier” configuration. As illustrated in Figure 46, an “inverted
multiplier” analog divider can be configured with a multiplier
operating in the feedback loop of an operational amplifier. T he
general form of the transfer function for this circuit configuration is
given by:
V
O
=
2.5
V
×
R
2
R
1
V
IN
V
X
Here, the multiplier operates as a voltage-controlled potentiometer
that adjusts the loop gain of the op amp relative to a control signal,
V
. As the control signal to the multiplier decreases, the output of
the multiplier decreases as well. T his has the effect of reducing
negative feedback which, in turn, decreases the amplifier’s loop
gain. T he result is higher closed-loop gain and reduced circuit
bandwidth. As V
is increased, the output of the multiplier
increases which generates more negative feedback — closed-loop
gain drops and circuit bandwidth increases. An example of an
“inverted multiplier” analog divider frequency response is shown in
Figure 47.
MLT04
18
17
16
15
14
13
12
11
10
18
17
16
15
14
13
12
11
10
4
1
2
3
5
6
7
8
9
MLT04
W4
GND4
X4
V
EE
Y4
Y3
X3
GND3
W3
W1
GND1
X1
Y1
V
CC
Y2
X2
GND2
W2
W4
X4
Y4
Y3
X3
W3
0.1μF
–5V
0.1μF
W1
X1
Y1
Y2
X2
W
1–4
= 0.4 (X
1–4
Y
1–4
)
W2
+5V
0.4
+5V
–5V
X
GND
Y
W
1/4 MLT04
V
IN
0.1μF
0.1μF
W = 0.4 V
IN2
+
+
R
L
10k
1C1
1/4 MLT04
0.4
3
2
1
W1
4
+
+
V
O
2
3
1
A1
+
A1, A2 = 1/2 OP285
R2
10k
R5
500k
P1
50k
R1
10k
+5V
–5V
6
5
7
A2
+
R4
10k
R6
500k
P2
50k
R3
+5V
–5V
V
IN
Y
OS
TRIM
X
OS
TRIM
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|---|---|
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