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參數(shù)資料
| 型號： | MM74C373N |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | 3-STATE Octal D-Type Latch . 3-STATE Octal D-Type Flip-Flop |
| 中文描述： | CMOS SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDIP20 |
| 封裝： | 0.300 INCH, PLASTIC, MS-001, DIP-20 |
| 文件頁數(shù)： | 6/11頁 |
| 文件大?。?/td> | 113K |
| 代理商： | MM74C373N |
www.fairchildsemi.com
6
M
AC Electrical Characteristics
(Note 6)
MM74C374, T
A
=
25
°
C, C
L
=
50 pF, t
r
=
t
f
=
20 ns, unless otherwise noted
Symbol
Parameter
Note 6:
AC Parameters are guaranteed by DC correlated testing.
Note 7:
Capacitance is guaranteed by periodic testing.
Note 8:
C
PD
determines the no load AC power consumption of any CMOS device. For complete explanation see Family Characteristics Application Note
AN-90.
Conditions
Min
Typ
Max
Units
t
pd0
, t
pd1
Propagation Delay,
V
CC
=
5V, C
L
=
50 pF
V
CC
=
10V, C
L
=
50 pF
V
CC
=
5V, C
L
=
150 pF
V
CC
=
10V, C
L
=
150 pF
t
HOLD
=
0 ns
V
CC
=
5V
V
CC
=
10V
V
CC
=
5V
V
CC
=
10V
V
CC
=
5V
V
CC
=
10V
R
L
=
10k, C
L
=
50 pF
V
CC
=
5V
V
CC
=
10V
R
L
=
10k, C
L
=
50 pF
V
CC
=
5V
V
CC
=
10V
V
CC
=
5V, C
L
=
50 pF
V
CC
=
10V, C
L
=
50 pF
V
CC
=
5V, C
L
=
150 pF
V
CC
=
10V, C
L
=
150 pF
V
CC
=
5V
V
CC
=
10V
CLOCK Input (Note 7)
150
300
ns
CLOCK to Output
65
180
80
130
360
160
ns
ns
ns
t
SET-UP
Minimum Set-Up Time Data In
to CLOCK/LATCH ENABLE
70
140
ns
35
70
50
70
140
100
ns
ns
ns
t
PWH
, t
PWL
Minimum CLOCK Pulse Width
f
MAX
Maximum CLOCK Frequency
3.5
5
7.0
10
MHz
MHz
t
1H
, t
0H
Propagation Delay OUTPUT
DISABLE to High Impedance
State (from a Logic Level)
Propagation Delay OUTPUT
105
60
210
120
ns
ns
t
H1
, t
H0
DISABLE to Logic Level
(from High Impedance State)
Transition Time
105
45
65
210
90
130
ns
ns
ns
t
THL
, t
TLH
35
110
70
>
2000
>
2000
7.5
70
220
140
ns
ns
ns
μ
s
μ
s
pF
t
r
, t
f
Maximum CLOCK Rise
and Fall Time
Input Capacitance
15
5
C
CLK
C
OD
10
Input Capacitance
OUTPUT DISABLE
Input (Note 7)
Any Other Input (Note 7)
7.5
10
pF
C
IN
C
OUT
Input Capacitance
5
7.5
pF
Output Capacitance
High Impedance
State (Note 7)
Per Package (Note 8)
10
15
pF
C
PD
Power Dissipation Capacitance
250
pF
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PDF描述 |
|---|---|
| MM74C374M | 3-STATE Octal D-Type Latch . 3-STATE Octal D-Type Flip-Flop |
| MM74C374N | 3-STATE Octal D-Type Latch . 3-STATE Octal D-Type Flip-Flop |
| MM74C42 | BCD-to-Decimal Decoder |
| MM74C42N | BCD-to-Decimal Decoder |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MM74C373N_Q | 功能描述:閉鎖 3-STATE Oct D Latch RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| MM74C373WM | 功能描述:閉鎖 3-STATE Oct D Latch RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| MM74C373WMX | 功能描述:閉鎖 3-STATE Oct D Latch RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| MM74C374 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Octal D-Type Latch Octal D-Type Flip-Flop |
| MM74C374M | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:3-STATE Octal D-Type Latch . 3-STATE Octal D-Type Flip-Flop |
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