參數(shù)資料
型號: MM74HC125SJ
廠商: Fairchild Semiconductor
文件頁數(shù): 5/10頁
文件大?。?/td> 0K
描述: IC BUFF TRI-ST QD N-INV 14SOP
標準包裝: 47
系列: 74HC
邏輯類型: 緩沖器/線路驅(qū)動器,非反相
元件數(shù): 4
每個元件的位元數(shù): 1
輸出電流高,低: 7.8mA,7.8mA
電源電壓: 2 V ~ 6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 14-SOIC(0.209",5.30mm 寬)
供應(yīng)商設(shè)備封裝: 14-SOIC
包裝: 管件
1983 Fairchild Semiconductor Corporation
www.fairchildsemi.com
MM74HC125, MM74HC126 Rev. 1.3.0
4
MM74HC125,
MM74HC126
3-ST
A
TE
Quad
Buff
er
s
DC Electrical Characteristics(3)
Note:
3. For a power supply of 5V ±10% the worst case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V
values should be used when designing with this supply. Worst case VIH and VIL occur at VCC=5.5V and 4.5V
respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage current (IIN, ICC, and IOZ) occur for CMOS at
the higher voltage and so the 6.0V values should be used.
Symbol
Parameter
Conditions
VCC (V)
TA = 25°C
TA = –40°C
to 85°C
TA = –40°C
to 125°C
Units
Typ.
Guaranteed Limits
VIH
Minimum HIGH
Level Input
Voltage
2.0
1.5
V
4.5
3.15
6.0
4.2
VIL
Maximum LOW
Level Input
Voltage
2.0
0.5
V
4.5
1.35
6.0
1.8
VOH
Minimum HIGH
Level Output
Voltage
VIN = VIH or VIL,
|IOUT| ≤ 20A
2.0
1.9
V
4.5
4.4
6.0
5.9
VIN = VIH or VIL,
|IOUT| ≤ 6.0mA
4.5
4.2
3.98
3.84
3.7
VIN = VIH or VIL,
|IOUT| ≤ 7.8mA
6.0
5.7
5.48
5.34
5.2
VOL
Maximum LOW
Level Output
Voltage
VIN = VIH or VIL,
|IOUT| ≤ 20A
2.0
0
0.1
V
4.5
0
0.1
6.0
0
0.1
VIN = VIH or VIL,
|IOUT| ≤ 6.0mA
4.5
0.2
0.26
0.33
0.4
VIN = VIH or VIL,
|IOUT| ≤ 7.8mA
6.0
0.2
0.26
0.33
0.4
IOZ
Maximum
3-STATE Output
Leakage Current
VIN = VIH or VIL,
VOUT = VCC or GND,
Cn = Disabled
6.0
±0.5
±5
±10
A
IIN
Maximum Input
Current
VIN = VCC or GND
6.0
±0.1
±1.0
A
ICC
Maximum
Quiescent
Supply Current
VIN = VCC or GND,
IOUT = 0A
6.0
8.0
80
160
A
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MM74HC126J 制造商:未知廠家 制造商全稱:未知廠家 功能描述:4-Bit Buffer/Driver
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