參數(shù)資料
型號(hào): MM74HC126MTC
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: 3-STATE Quad Buffers
中文描述: HC/UH SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, PDSO14
封裝: 4.40 MM, MO-153, TSSOP-14
文件頁數(shù): 3/6頁
文件大?。?/td> 82K
代理商: MM74HC126MTC
3
www.fairchildsemi.com
M
AC Electrical Characteristics
V
CC
=
5V, T
A
=
25
°
C, C
L
=
45 pF, t
r
=
t
f
=
6 ns
AC Electrical Characteristics
V
CC
=
2.0V to 6.0V, C
L
=
50 pF, t
r
=
t
f
=
6 ns (unless otherwise specified)
Note 5:
C
PD
determines the no load dynamic power consumption, P
D
=
C
PD
V
CC2
f
+
I
CC
V
CC
, and the no load dynamic current consumption,
I
S
=
C
PD
V
CC
f
+
I
CC
.
Symbol
Parameter
Conditions
Typ
Guaranteed
Limit
Units
t
PHL
, t
PLH
Maximum
13
18
ns
Propagation Delay Time
Maximum
Output Enable Time to HIGH Level
t
PZH
R
L
=
1 k
13
25
ns
t
PHZ
Maximum
Output Disable Time from HIGH Level
Maximum
R
L
=
1 k
C
L
=
5 pF
R
L
=
1 k
17
25
ns
t
PZL
18
25
ns
Output Enable Time to LOW Level
Maximum
t
PLZ
R
L
=
1 k
C
L
=
5 pF
13
25
ns
Output Disable Time from LOW Level
Symbol
Parameter
Conditions
V
CC
T
A
=
25
°
C
Typ
40
14
T
A
=
40 to 85
°
C T
A
=
40 to 125
°
C
Guaranteed Limits
125
25
Units
t
PHL
, t
PLH
Maximum Propagation
Delay Time
2.0V
4.5V
100
20
150
30
ns
ns
6.0V
2.0V
4.5V
12
35
14
17
130
26
21
163
33
25
195
39
ns
ns
ns
t
PLH
, t
PHL
Maximum Propagation
Delay Time
C
L
=
150 pF
6.0V
2.0V
4.5V
12
25
14
22
125
25
28
156
31
39
188
38
ns
ns
ns
t
PZH
, t
PZL
Maximum Output
Enable Time
R
L
=
1 k
6.0V
2.0V
4.5V
12
25
14
21
125
25
26
156
31
31
188
38
ns
ns
ns
t
PHZ
, t
PLZ
Maximum Output
Disable Time
R
L
=
1 k
6.0V
2.0V
4.5V
12
35
15
21
140
28
26
175
35
31
210
42
ns
ns
ns
t
PZL
, t
PZH
Maximum Output
Enable Time
C
L
=
150 pF
R
L
=
1 k
6.0V
2.0V
4.5V
13
30
7
24
60
12
30
75
15
36
90
18
ns
ns
ns
t
TLH
, t
THL
Maximum Output
Rise and Fall Time
C
L
=
50 pF
6.0V
6
5
10
10
20
13
10
20
15
10
20
ns
pF
pF
C
IN
C
OUT
C
PD
Input Capacitance
Output Capacitance Outputs
15
Power Dissipation
Capacitance (Note 5)
(per gate)
Enabled
Disabled
45
6
pF
pF
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