VCC 5V, T
參數(shù)資料
型號(hào): MM74HC244SJX
廠商: Fairchild Semiconductor
文件頁(yè)數(shù): 4/8頁(yè)
文件大?。?/td> 0K
描述: IC BUFF/DVR TRI-ST DUAL 20SOP
標(biāo)準(zhǔn)包裝: 2,000
系列: 74HC
邏輯類型: 緩沖器/線路驅(qū)動(dòng)器,非反相
元件數(shù): 2
每個(gè)元件的位元數(shù): 4
輸出電流高,低: 7.8mA,7.8mA
電源電壓: 2 V ~ 6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-SOIC(0.209",5.30mm 寬)
供應(yīng)商設(shè)備封裝: 20-SOIC
包裝: 帶卷 (TR)
www.fairchildsemi.com
4
MM
74HC244
AC Electrical Characteristics
VCC
5V, TA 25qC, tr tf 6 ns
AC Electrical Characteristics
VCC
2.0V-6.0V, CL 50 pF, tr tf 6 ns (unless otherwise specified)
Note 5: CPD determines the no load dynamic power consumption, PD CPD VCC
2f I
CC VCC, and the no load dynamic current consumption,
IS CPD VCCf ICC.
Symbol
Parameter
Conditions
Typ
Guaranteed
Units
Limit
tPHL, tPLH
Maximum Propagation
CL 45 pF
14
20
ns
Delay
tPZH, tPZL
Maximum Enable Delay
RL 1 k:
17
28
ns
to Active Output
CL 45 pF
tPHZ, tPLZ
Maximum Disable Delay
RL 1 k:
15
25
ns
from Active Output
CL 5 pF
Symbol
Parameter
Conditions
VCC
TA 25qCTA 40 to 85qC TA 55 to 125qC
Units
Typ
Guaranteed Limits
tPHL, tPLH Maximum Propagation
CL 50 pF
2.0V
58
115
145
171
ns
Delay
CL 150 pF
2.0V
83
165
208
246
ns
CL 50 pF
4.5V
14
23
29
34
ns
CL 150 pF
4.5V
17
33
42
49
ns
CL 50 pF
6.0V
10
20
25
29
ns
CL 150 pF
6.0V
14
28
35
42
ns
tPZH, tPZL Maximum Output Enable
RL 1 k:
Time
CL 50 pF
2.0V
75
150
189
224
ns
CL 150 pF
2.0V
100
200
252
298
ns
CL 50 pF
4.5V
15
30
38
45
ns
CL 150 pF
4.5V
30
40
50
60
ns
CL 50 pF
6.0V
13
26
32
38
ns
CL 150 pF
6.0V
17
34
43
51
ns
tPHZ, tPLZ Maximum Output Disable
RL 1 k:
2.0V
75
150
189
224
ns
Time
CL 50 pF
4.5V
15
30
38
45
ns
6.0V
13
26
32
38
ns
tTLH, tTHL Maximum Output
2.0V
60
75
90
ns
Rise and Fall Time
4.5V
12
15
18
ns
6.0V
10
13
15
ns
CPD
Power Dissipation
(per buffer)
Capacitance (Note 5)
G
VIH
12
pF
G
VIL
50
pF
CIN
Maximum Input
5
10
pF
Capacitance
COUT
Maximum Output
10
20
pF
Capacitance
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PDF描述
74VHC244SJX IC BUFF/DVR TRI-ST DUAL 20SOP
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