參數(shù)資料
型號: MM74HC4514J
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 編、解碼器及復(fù)用、解復(fù)用
英文描述: HC/UH SERIES, OTHER DECODER/DRIVER, TRUE OUTPUT, CDIP24
封裝: CERAMIC, DIP-24
文件頁數(shù): 3/6頁
文件大?。?/td> 139K
代理商: MM74HC4514J
AC Electrical Characteristics VCCe5V TAe25 C CLe15 pF tretfe6ns
Symbol
Parameter
Conditions
Typ
Guaranteed
Units
Limit
tPHL tPLH
Maximum Propagation Delay Data to Output
18
30
ns
tPHL
Maximum Propagation Delay LE to Output
18
30
ns
tPLH
Maximum Propagation Delay LE to Output
24
40
ns
tPHL
Maximum Propagation Delay Inhibit to Output
16
30
ns
tPLH
Maximum Propagation Delay Inhibit to Output
24
40
ns
ts
Minimum Setup Time Date to LE
20
ns
tH
Minimum Hold Time LE to Data
5
ns
tW
Minimum Pulse Width Latch Enable
16
ns
AC Electrical Characteristics VCCe20V–60V CLe50 pF tretfe6 ns (unless otherwise specified)
TAe25 C
74HC
54HC
Symbol
Parameter
Conditions
VCC
TAeb40 to 85 CTAeb55 to 125 C
Units
Typ
Guaranteed Limits
tPHL tPLH
Maximum Propagation
20V
80
175
220
263
ns
Delay Data to Output
45V
18
35
44
53
ns
60V
16
30
38
45
ns
tPHL
Maximum Propagation
20V
80
175
220
263
ns
Delay LE to Output
45V
19
35
44
53
ns
60V
17
30
38
45
ns
tPLH
Maximum Propagation
20V
120
230
290
343
ns
Delay LE to Output
45V
27
46
58
69
ns
60V
22
39
49
58
ns
tPHL
Maximum Propagation
20V
70
175
220
263
ns
Delay Inhibit to Output
45V
18
35
44
53
ns
60V
16
30
38
45
ns
tPLH
Maximum Propagation
20V
120
230
290
343
ns
Delay Inhibit to Output
45V
27
46
58
69
ns
60V
22
39
49
58
ns
ts
Minimum Setup Time
20V
100
125
150
ns
Data to LE
45V
20
25
30
ns
60V
17
21
25
ns
tH
Minimum Hold Time
20V
5
ns
LE to Data
45V
5
ns
60V
5
ns
tW
Minimum Pulse Width
20V
80
100
120
ns
Latch Enable
45V
16
20
24
ns
60V
14
17
20
ns
CPD
Power Dissipation
290
pF
Capacitance
CIN
Maximum Input
510
10
pF
Capacitance
Note 5
CPD determines the no load dynamic power consumption PDeCPD VCC2 faICC VCC and the no load dynamic current consumption ISeCPD VCC faICC
3
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