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參數(shù)資料
| 型號： | MM74HC573WMX |
| 廠商： | Fairchild Semiconductor |
| 文件頁數(shù)： | 2/8頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LATCH OCTAL D 3STATE 20-SOIC |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | 74HC |
| 邏輯類型： | D 型透明鎖存器 |
| 電路： | 8:8 |
| 輸出類型： | 三態(tài) |
| 電源電壓： | 2 V ~ 6 V |
| 獨立電路： | 1 |
| 延遲時間 - 傳輸： | 15ns |
| 輸出電流高，低： | 7.8mA，7.8mA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-SOIC |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 產(chǎn)品目錄頁面： | 1209 (CN2011-ZH PDF) |
| 其它名稱： | MM74HC573WMXDKR |
www.fairchildsemi.com
2
MM
74HC573
Absolute Maximum Ratings(Note 1)
(Note 2)
Recommended Operating
Conditions
Note 1: Absolute Maximum Ratings are those values beyond which dam-
age to the device may occur.
Note 2: Unless otherwise specified all voltages are referenced to ground.
Note 3: Power Dissipation temperature derating — plastic “N” package:
12 mW/
qC from 65qC to 85qC.
DC Electrical Characteristics (Note 4)
Note 4: For a power supply of 5V
r10% the worst-case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V values should be used when
designing with this supply. Worst-case VIH and VIL occur at VCC 5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst-case leakage cur-
rent (IIN, ICC, and IOZ) occur for CMOS at the higher voltage and so the 6.0V values should be used.
Supply Voltage (VCC)
0.5 to 7.0V
DC Input Voltage (VIN)
1.5 to VCC 1.5V
DC Output Voltage (VOUT)
0.5 to VCC 0.5V
Clamp Diode Current (IIK, IOK)
r20 mA
DC Output Current, per pin (IOUT)
r35 mA
DC VCC or GND Current, per pin (ICC)
r70 mA
Storage Temperature Range (TSTG)
65qC to 150qC
Power Dissipation (PD)
(Note 3)
600 mW
S.O. Package only
500 mW
Lead Temperature (TL)
(Soldering 10 seconds)
260
qC
Min
Max
Units
Supply Voltage (VCC)2
6
V
DC Input or Output Voltage
0
VCC
V
(VIN, VOUT)
Operating Temperature Range (TA)
40 85
qC
Input Rise or Fall Times
(tr, tf)
VCC 2.0V
1000
ns
VCC 4.5V
500
ns
VCC 6.0V
400
ns
Symbol
Parameter
Conditions
VCC
TA 25qCTA 40 to 85qCTA 55 to 125qC
Units
Typ
Guaranteed Limits
VIH
Minimum HIGH Level Input
2.0V
1.5
V
Voltage
4.5V
3.15
V
6.0V
4.2
V
VIL
Maximum LOW Level Input
2.0V
0.5
V
Voltage
4.5V
1.35
V
6.0V
1.8
V
VOH
Minimum HIGH Level Output
VIN VIH or VIL
Voltage
|IOUT| d 20 PA
2.0V
2.0
1.9
V
4.5V
4.5
4.4
V
6.0V
6.0
5.9
V
VIN VIH or VIL
|IOUT| d 6.0 mA
4.5V
4.2
3.98
3.84
3.7
V
|IOUT| d 7.8 mA
6.0V
5.7
5.48
5.34
5.2
V
VOL
Maximum LOW Level Output
VIN VIH or VIL
Voltage
|IOUT| d 20 PA
2.0V
0
0.1
V
4.5V
0
0.1
V
6.0V
0
0.1
V
VIN VIH or VIL
|IOUT| d 6.0 mA
4.5V
0.2
0.26
0.33
0.4
V
|IOUT| d 7.8 mA
6.0V
0.2
0.26
0.33
0.4
V
IIN
Maximum Input Current
VIN VCC or GND
6.0V
r0.1
r1.0
PA
IOZ
Maximum 3-STATE Output
VOUT VCC or GND
Leakage Current
OC
VIH
6.0V
r0.5
r5.0
r10
PA
ICC
Maximum Quiescent Supply
VIN VCC or GND
Current
IOUT 0 PA
6.0V
8.0
80
160
PA
'ICC
Quiescent Supply Current
VCC 5.5V
OE
1.0
1.5
1.8
2.0
mA
per Input Pin
VIN 2.4V
LE
0.6
0.8
1.0
1.1
mA
or 0.4V (Note 4)
DATA
0.4
0.5
0.6
0.7
mA
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| MM74HC573WMX_NL | 制造商:Fairchild Semiconductor Corporation 功能描述:3-STATE OCTAL D-TYPE LATCH |
| MM74HC573WMX-CUT TAPE | 制造商:FAIRCHILD 功能描述:MM74HC Series High Speed CMOS 3-STATE Octal D-Type Latch - SOIC-20 |
| MM74HC574 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:3-STATE Octal D-Type Edge-Triggered Flip-Flop |
| MM74HC574J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Octal D-Type Flip-Flop |
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