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參數(shù)資料
| 型號(hào)： | MM74HC597 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | 5-Bit Synchronous CPU Buck Controller; Package: SO-16 WB; No of Pins: 16; Container: Tape and Reel; Qty per Container: 1000 |
| 中文描述： | 8位輸入鎖存移位寄存器與 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 85K |
| 代理商： | MM74HC597 |
2000 Fairchild Semiconductor Corporation
DS005343
www.fairchildsemi.com
January 1988
Revised August 2000
M
MM74HC597
8-Bit Shift Registers with Input Latches
General Description
This high speed register utilizes advanced silicon-gate
CMOS technology. It has the high noise immunity and low
power consumption of standard CMOS integrated circuits,
as well as the ability to drive 10 LS-TTL loads.
The MM74HC597 comes in a 16-pin package and consists
of an 8-bit storage latch feeding a parallel-in, serial-out
8-bit shift register. Both the storage register and shift regis-
ter have positive-edge triggered clocks. the shift register
also has direct load (from storage) and clear inputs.
The 74HC logic family is speed, function, and pin-out com-
patible with the standard 74LS logic family. All inputs are
protected from damage due to static discharge by internal
diode clamps to V
CC
and ground.
Features
I
8-bit parallel storage register inputs
I
Wide operating voltage range: 2V–6V
I
Shift register has direct overriding load and clear
I
Guaranteed shift frequency: DC to 30 MHz
I
Low quiescent current: 80
μ
A maximum
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter
“
X
”
to the ordering code.
Connection Diagram
Top View
Truth Table
Order Number
MM74HC597M
MM74HC597SJ
MM74HC597N
Package Number
M16A
M16D
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
RCK SCK SLOAD SCLR
↑
X
Function
X
X
Data Loaded to input latches
Data loaded from inputs to
shift register
Data transferred from
input latches to shift
register
Invalid logic, state of
shift register indeterminate
when signals removed
Shift register cleared
Shift register clocked
Q
n
=
Q
n
1, Q
0
=
SER
↑
X
L
H
No
clock
edge
X
L
H
X
X
L
L
X
X
H
L
X
↑
H
H
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MM74HC597M | 1.5A 280kHz/560kHz Boost Regulators; Package: SOIC-8 Narrow Body; No of Pins: 8; Container: Rail; Qty per Container: 98 |
| MM74HC597N | 1.5 A 280kHz/560kHz Boost Regulators; Package: SOIC-8 Narrow Body; No of Pins: 8; Container: Rail; Qty per Container: 98 |
| MM74HC597SJ | 1.5 A 280kHz/560kHz Boost Regulators; Package: SOIC-8 Narrow Body; No of Pins: 8; Container: Tape and Reel; Qty per Container: 2500 |
| MM74HC688 | 1.5A 280kHz/560kHz Boost Regulators; Package: SOIC-8 Narrow Body; No of Pins: 8; Container: Rail; Qty per Container: 98 |
| MM74HC688N | 1.5 A 280kHz/560kHz Boost Regulators; Package: SOIC-8 Narrow Body; No of Pins: 8; Container: Rail; Qty per Container: 98 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MM74HC597_04 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:8-Bit Shift Registers with Input Latches |
| MM74HC597_CBA3026T WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| MM74HC597M | 功能描述:計(jì)數(shù)器移位寄存器 8-Bit Shift Register RoHS:否 制造商:Texas Instruments 計(jì)數(shù)器類型: 計(jì)數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時(shí)間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| MM74HC597MX | 功能描述:計(jì)數(shù)器移位寄存器 RoHS:否 制造商:Texas Instruments 計(jì)數(shù)器類型: 計(jì)數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時(shí)間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| MM74HC597N | 功能描述:計(jì)數(shù)器移位寄存器 8-Bit Shift Register RoHS:否 制造商:Texas Instruments 計(jì)數(shù)器類型: 計(jì)數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時(shí)間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
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