參數(shù)資料
型號: MM74HC86MX
廠商: Fairchild Semiconductor
文件頁數(shù): 1/7頁
文件大小: 0K
描述: IC GATE OR QUAD 2INP EXCL 14SOIC
標(biāo)準(zhǔn)包裝: 1
系列: 74HC
邏輯類型: XOR(異或)
電路數(shù): 4
輸入數(shù): 2
電源電壓: 2 V ~ 6 V
電流 - 靜態(tài)(最大值): 2µA
輸出電流高,低: 5.2mA,5.2mA
邏輯電平 - 低: 0.5 V ~ 1.8 V
邏輯電平 - 高: 1.5 V ~ 4.2 V
額定電壓和最大 CL 時(shí)的最大傳播延遲: 20ns @ 6V,50pF
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
供應(yīng)商設(shè)備封裝: 14-SOIC
封裝/外殼: 14-SOIC(0.154",3.90mm 寬)
包裝: 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁面: 1208 (CN2011-ZH PDF)
其它名稱: MM74HC86MXDKR
May 2012
1983 Fairchild Semiconductor Corporation
www.fairchildsemi.com
MM74HC86 Rev. 1.4.0
MM74HC86
Quad
2-Input
Exclusive
OR
Gate
MM74HC86
Quad 2-Input Exclusive OR Gate
Features
Typical Propagation Delay: 9ns
Wide Operating Voltage Range: 2–6V
Low Input Current: 1mA Maximum
Low Quiescent Current: 20mA Max. (74 Series)
Output Drive Capability: 10 LS-TTL Loads
Figure 1.
Pin Assignments (Top View)
Description
The MM74HC86 exclusive OR gate utilizes advanced
silicon-gate CMOS technology to achieve operating
speeds similar to equivalent LS-TTL gates, while
maintaining the low power consumption and high noise
immunity characteristic of standard CMOS integrated
circuits. These gates are fully buffered and have a
fanout of 10 LS-TTL loads. The 74HC logic family is
functionally as well as pin-out compatible with the
standard 74LS logic family. All inputs are protected from
damage due to static discharge by internal diode clamps
to VCC and ground.
Table 1.
Truth Table
Inputs
Outputs
A
B
Y
(1)
L
H
L
H
L
Note:
1.
B
A
B
A
B
A
Y
Ordering Information
Part Number
Operating
Temperature Range
Package
Packing Method
MM74HC86M
-40 to +85°C
14-Lead, Small Outline Integrated Circuit
(SOIC), JEDEC MS-012, 0.150" Narrow
Tube
MM74HC86MX
Tape & Reel
MM74HC86MTC
14-Lead, Thin Shrink Small Outline Package
(TSSOP), JEDEC MO-153, 4.4mm Wide
Tube
MM74HC86MTCX
Tape & Reel
Note:
2.
Pb-Free package per JEDEC J-STD-020B.
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