LOGIC COMMANDS AND REGISTERS . SPI Control" />
參數(shù)資料
型號: MM908E624AYEWR2
廠商: Freescale Semiconductor
文件頁數(shù): 19/39頁
文件大?。?/td> 0K
描述: IC TRPL SWITCH MCU/LIN 54-SOIC
標準包裝: 1,000
應(yīng)用: 自動鏡像控制
核心處理器: HC08
程序存儲器類型: 閃存(16 kB)
控制器系列: 908E
RAM 容量: 512 x 8
接口: SCI,SPI
輸入/輸出數(shù): 16
電源電壓: 5.5 V ~ 18 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 54-BSSOP(0.295",7.50mm 寬)
包裝: 帶卷 (TR)
供應(yīng)商設(shè)備封裝: 54-SOIC
配用: KIT908E624DWBEVB-ND - KIT EVAL 908E624 TRPL W/MCU/LIN
Analog Integrated Circuit Device Data
26
Freescale Semiconductor
908E624
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
.
SPI Control Register (Write)
Table 8 shows the SPI Control register bits by name.
LINSL2:1—LIN Baud Rate and Low-power Mode
Selection Bits
These bits select the LIN slew rate and requested low-
power mode in accordance with Table 9. Reset clears the
LINSL2:1 bits.
LIN-PU—LIN Pull-up Enable Bit
This bit controls the LIN pull-up resistor during Sleep and
Stop modes.
1 = Pull-up disconnected in Sleep and Stop modes.
0 = Pull-up connected in Sleep and Stop modes.
If the Pull-up is disconnected, a small current source is
used to pull the LIN pin in recessive state. In case of an
erroneous short of the LIN bus to ground, this will significantly
reduce the power consumption, e.g. in combination with
STOP/SLEEP mode.
HS3ON:HS1ON—High Side H3:HS1 Enable Bits
These bits enable the HSx. Reset clears the HSxON bit.
1 = HSx switched on (refer to Note below).
0 = HSx switched off.
Note
If no PWM on HS1 and HS2 is required, the PWMIN
pin must be connected to the VDD pin.
MODE2:1—Mode Section Bits
The MODE2:1 bits control the operating modes and the
watchdog in accordance with Table 10.
To safely enter Sleep or Stop mode and to ensure that
these modes are not affected by noise issue during SPI
transmission, the Sleep/Stop commands require two SPI
transmissions.
Sleep Mode Sequence
The Sleep command, as shown in Table 11, must be sent
twice.
Table 7. SPI Register Overview
Read/Write
Information
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Write
LINSL2
LINSL1
LIN-PU
HS3ON
HS2ON
HS1ON
MODE2
MODE1
Read
INTSRC (30)
LINWU
or
LINFAIL
HVF
LVF
or
BATFAIL (31)
VDDT
HSST
L2
L1
Write Reset Value
0
Write Reset Condition
POR,
RESET
POR,
RESET
POR
POR, RESET
POR,
RESET
POR,
RESET
——
Notes
30.
D7 signals interrupts and wake-up interrupts, D6:D0 indicated the source.
31.
The first SPI read after reset returns the BATFAIL flag state on bit D4.
Table 8. Control Bits Function (Write Operation)
D7
D6
D5
D4
D3
D2
D1
D0
LINSL2 LINSL1 LIN-PU HS3ON HS2ON HS1ON MODE2 MODE1
Table 9. LIN Baud Rate and Low-power Mode Selection
Bits
LINSL2
LINSL1
Description
0
Baud Rate up to 20 kbps (normal)
0
1
Baud Rate up to 10 kbps (slow)
1
0
Fast Program Download
Baud Rate up to 100 kbps
1
Low-power Mode (Sleep or Stop) Request
Table 10. Mode Selection Bits
MODE2
MODE1
Description
0
Sleep Mode (32)
0
1
Stop Mode (32)
1
0
Watchdog Clear (33)
1
Run (Normal) Mode
Notes
32.
To enter Sleep and Stop mode, a special sequence of SPI
commands is implemented.
33.
The device stays in Run (Normal) mode.
Table 11. Sleep Command Bits
LINSL2
LINSL1
LIN-PU HS3ON HS2ON HS1ON MODE2 MODE1
11
0/1
0
00
0
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