Analog Integrated Circuit Device Data
Freescale Semiconductor
15
908E626
FUNCTIONAL DESCRIPTION
INTRODUCTION
FUNCTIONAL DESCRIPTION
INTRODUCTION
The 908E626 device was designed and developed as a
highly integrated and cost-effective solution for automotive
and industrial applications. For automotive body electronics,
the 908E626 is well suited to perform stepper motor control,
e.g. for climate or light-levelling control via a 3-wire LIN bus.
This device combines an standard HC08 MCU core
(68HC908EY16) with flash memory together with a
SMARTMOS IC chip. The SMARTMOS IC chip combines
power and control in one chip. Power switches are provided
on the SMARTMOS IC configured as four half-bridge
outputs. Other ports are also provided including a selectable
HVDD pin. An internal voltage regulator is provided on the
SMARTMOS IC chip, which provides power to the MCU chip.
Also included in this device is a LIN physical layer, which
communicates using a single wire. This enables the device to
be compatible with 3-wire bus systems, where one wire is
used for communication, one for battery, and the third for
ground.
FUNCTIONAL PIN DESCRIPTION
See
Figures 1, for a graphic representation of the various
pins referred to in the following paragraphs. Also, see the pin
diagram on
Figures 3 for a depiction of the pin locations on
the package.
PORT A I/O PINS (PTA0:4)
These pins are special function, bidirectional I/O port pins
that are shared with other functional modules in the MCU.
PTA0:PTA4 are shared with the keyboard interrupt pins,
KBD0:KBD4.
The PTA5/SPSCK pin is not accessible in this device and
is internally connected to the SPI clock pin of the analog die.
The PTA6/SS pin is likewise not accessible.
For details refer to the 68HC908EY16 datasheet.
PORT B I/O PINS (PTB1, PTB3:7)
These pins are special function, bidirectional I/O port pins
that are shared with other functional modules in the MCU. All
pins are shared with the ADC module. The PTB6:PTB7 pins
are also shared with the Timer B module.
PTB0/AD0 is internally connected to the ADOUT pin of the
analog die, allowing diagnostic measurements to be
calculated; e.g., current recopy, VSUP, etc. The PTB2/AD2
pin is not accessible in this device.
For details refer to the 68HC908EY16 datasheet.
PORT C I/O PINS (PTC2:4)
These pins are special function, bidirectional I/O port pins
that are shared with other functional modules in the MCU. For
example, PTC2:PTC4 are shared with the ICG module.
PTC0/MISO and PTC1/MOSI are not accessible in this
device and are internally connected to the MISO and MOSI
SPI pins of the analog die.
For details refer to the 68HC908EY16 datasheet.
PORT D I/O PINS (PTD0:1)
PTD1/TACH1 and PTD0/TACH0/BEMF are special
function, bidirectional I/O port pins that can also be
programmed to be timer pins.
In step motor applications, the PTD0 pin should be
connected to the BEMF output of the analog die, to evaluate
the BEMF signal with a special BEMF module of the MCU.
PTD1 pin is recommended for use as an output pin for
generating the FGEN signal (PWM signal), if required by the
application.
PORT E I/O PIN (PTE1)
PTE1/RXD and PTE0/TXD are special function,
bidirectional I/O port pins that can also be programmed to be
enhanced serial communication.
PTE0/TXD is internally connected to the TXD pin of the
analog die.The connection for the receiver must be done
externally.
EXTERNAL INTERRUPT PIN (IRQ)
The IRQ pin is an asynchronous external interrupt pin. This
pin contains an internal pull-up resistor that is always
activated, even when the IRQ pin is pulled LOW.
For details refer to the 68HC908EY16 datasheet.
EXTERNAL RESET PIN (RST)
A logic [0] on the RST pin forces the MCU to a known
startup state. RST is bidirectional, allowing a reset of the
entire system. It is driven LOW when any internal reset
source is asserted.
This pin contains an internal pull-up resistor that is always
activated, even when the reset pin is pulled LOW.
For details refer to the 68HC908EY16 datasheet.