參數(shù)資料
型號(hào)： MP28275EL
廠商： MONOLITHIC POWER SYSTEMS INC
元件分類： 穩(wěn)壓器
英文描述： SWITCHING REGULATOR, 1300 kHz SWITCHING FREQ-MAX, PDSO14
封裝： 3 X 4 MM, MO-229VGED-3, QFN-14
文件頁(yè)數(shù)： 4/14頁(yè)
文件大小： 372K
代理商： MP28275EL
MP28275 – 5A, 7V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS
MP28275 Rev. 0.91
www.MonolithicPower.com
12
12/2/2009
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
2009 MPS. All Rights Reserved.
Selecting the Output Capacitor
The output capacitor (C2) is required to
maintain the DC output voltage. Ceramic,
tantalum, or low ESR electrolytic capacitors are
recommended.
Low
ESR
capacitors
are
preferred to keep the output voltage ripple low.
The output voltage ripple can be estimated by:
×
+
×
×
=
Δ
2
C
f
8
1
R
V
1
L
f
V
S
ESR
IN
OUT
S
OUT
Where L is the inductor value and RESR is the
equivalent series resistance (ESR) value of the
output capacitor.
In the case of ceramic capacitors, the
impedance at the switching frequency is
dominated by the capacitance. The output
voltage ripple is mainly caused by the
capacitance. For simplification, the output
voltage ripple can be estimated by:
×
=
IN
OUT
2
S
OUT
V
1
2
C
L
f
8
V
ΔV
In the case of tantalum or electrolytic capacitors,
the ESR dominates the impedance at the
switching frequency. For simplification, the
output ripple can be approximated to:
ESR
IN
OUT
S
OUT
R
V
1
L
f
V
ΔV
×
×
=
The characteristics of the output capacitor also
affect the stability of the regulation system. The
MP28275 can be optimized for a wide range of
capacitance and ESR values.
PCB Layout
PCB layout is very important to achieve stable
operation. Please follow these guidelines and
take Figure 7 for references.
1) Keep the connection of input ground and
GND pin as short and wide as possible.
2) Keep the connection of input capacitor and
IN pin as short and wide as possible.
3) Ensure all feedback connections are short
and direct. Place the feedback resistors
and compensation components as close to
the chip as possible.
4) Route SW away from sensitive analog
areas such as FB.
5) Connect IN, SW, and especially GND
respectively to a large copper area to cool
the chip to improve thermal performance
and long-term reliability.
6) Adding RC snubber circuit from IN pin to
SW pin can reduce SW spikes.
C4
Top Layer
Bottom Layer
Figure 7—PCB Layout
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