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參數(shù)資料
| 型號： | MP7610AP |
| 廠商： | EXAR CORP |
| 元件分類： | DAC |
| 英文描述： | D/A Converter with Output Amplifier and Serial Data/Address mP Control Logic |
| 中文描述： | OCTAL, SERIAL INPUT LOADING, 30 us SETTLING TIME, 14-BIT DAC, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁數(shù)： | 5/16頁 |
| 文件大?。?/td> | 571K |
| 代理商： | MP7610AP |
MP7610
5
Rev. 4.01
25
°
C
Typ
Tmin to Tmax
Min
ELECTRICAL CHARACTERISTICS (CONT’D)
Parameter
Symbol
Min
Max
Max
Units
Test Conditions/Comments
DYNAMIC PERFORMANCE
Voltage Settling from LD
to VDAC Out
1
Channel-to-Channel Crosstalk
6
Digital Feedthrough
1, 6
Power Supply Rejection Ratio
t
sd
30
50
50
μ
s
ZS to FS (20 V Step)
5k, 50pF load
DC
CLK and Data to V
OUTi
V
EE
&
V
CC
=
±
5%, ppm of FS
CT
Q
0.04
--70
LSB
dB
ppm/%
PSRR
5
REFERENCE INPUTS
Impedance of V
REF
REF
350
700
1.05k
350
1.05k
See Application Hints for Driving
the reference input
V
REF
Voltage1,
2
V
REF
3.5
6
V
DIGITAL INPUTS
3
Logic High
Logic Low
Input Current
Input Capacitance
1
V
IH
V
IL
2.4
V
V
μ
A
pF
0.8
±
10
I
L
C
L
8
ANALOG OUTPUTS
Output Swing
Output Drive Current
Output Impedance
Output Short Circuit Current
--V
EE
+1.4
--5
V
CC
--1.4
V
mA
mA
mA
mA
mA
5
R
O
I
SC
1
25
30
40
55
+FS to AGND
+FS to V
EE
--FS to AGND
--FS to V
CC
DIGITAL OUTPUTS
Output High Voltage
Output Low Voltage
V
OH
V
OL
4.5
0.5
V
V
POWER SUPPLIES
V
CC
Voltage
5
V
EE
Voltage
5
DV
DD
Voltage
Positive Supply Current
Negative Supply Current
Digital Supply Current
Power Dissipation
V
CC
V
EE
DV
DD
I
CC
I
EE
I
DD
PD
ISS
V
REF
+1.5
--12.75
4.5
12
--12
12.75
V
REF
+1.5 12.75
--12.75
4.5
V
V
V
mA
mA
mA
mW
--5
5.5
10
20
--5
5.5
10
20
5
8
Bipolarzero
Bipolarzero
Bipolarzero
Bipolarzero
15
2
2
320
420
450
ANALOG GROUND CURRENT
Per Channel
1
I
AGND
±
60
μ
A
See Application Notes
DIGITAL TIMING
SPECIFICATIONS
1,4
V
IL
= 0, V
IH
= 5.0, C
L
= 20 pF
Input Clock Pulse Width
Data Setup Time
Data Hold Time
CLK to SDO Propagation Delay
DAC RegisterLoad Pulse Width
Preset Pulse Width
Clock Edge to Load Time
t
CH
, t
CL
60
15
15
ns
ns
ns
ns
ns
ns
ns
t
DS
t
DH
t
PD
t
LD
t
PR
40
45
65
t
CKLD1
t
CKLD2
t
HZ1
140
Note: t
LD
and t
CKLD2
cannot both
be min. since t
CKLD1
=t
CKLD2
+t
LD
0
LD Falling Edge to SDO
Tri-state Enable
50
ns
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MP7610AS | D/A Converter with Output Amplifier and Serial Data/Address mP Control Logic |
| MP7610BP | D/A Converter with Output Amplifier and Serial Data/Address mP Control Logic |
| MP7610BS | D/A Converter with Output Amplifier and Serial Data/Address mP Control Logic |
| MP7610CP | D/A Converter with Output Amplifier and Serial Data/Address mP Control Logic |
| MP7610CS | D/A Converter with Output Amplifier and Serial Data/Address mP Control Logic |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MP7610AS | 制造商:EXAR 制造商全稱:EXAR 功能描述:D/A Converter with Output Amplifier and Serial Data/Address mP Control Logic |
| MP7610BP | 制造商:EXAR 制造商全稱:EXAR 功能描述:D/A Converter with Output Amplifier and Serial Data/Address mP Control Logic |
| MP7610BS | 制造商:EXAR 制造商全稱:EXAR 功能描述:D/A Converter with Output Amplifier and Serial Data/Address mP Control Logic |
| MP7610CP | 制造商:EXAR 制造商全稱:EXAR 功能描述:D/A Converter with Output Amplifier and Serial Data/Address mP Control Logic |
| MP7610CS | 制造商:EXAR 制造商全稱:EXAR 功能描述:D/A Converter with Output Amplifier and Serial Data/Address mP Control Logic |
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