參數(shù)資料
型號: MP7626KN
廠商: EXAR CORP
元件分類: DAC
英文描述: Microprocessor Compatible Buffered Multiplying 16-Bit Digital-to-Analog Converter
中文描述: PARALLEL, WORD INPUT LOADING, 2 us SETTLING TIME, 16-BIT DAC, PDIP24
封裝: 0.600 INCH, PLASTIC, DIP-24
文件頁數(shù): 4/12頁
文件大?。?/td> 118K
代理商: MP7626KN
MP7626
4
Rev. 2.00
25
°
C
Typ
NOTES:
1
2
3
4
5
Specifications are subject to change without notice
ELECTRICAL CHARACTERISTICS (CON’T)
Tmin to Tmax
Min
Parameter
Symbol
Min
Max
Max
Units
Test Conditions/Comments
SWITCHING
CHARACTERISTICS
2, 4
Data Valid to Write Set-Up Time
Write Strobe Width
t
DS
t
SW
250
125
ns
ns
Full Scale Range (FSR) is 10V for unipolar mode.
Guaranteed but not production tested.
Digital input levels should not go below ground or exceed the positive supply voltage, otherwise damage may occur.
See timing diagram.
Specified values guarantee functionality. Refer to other parameters for accuracy.
ABSOLUTE MAXIMUM RATINGS (T
A
= +25
°
C unless otherwise noted)
1, 2
Supply Voltage
Voltage at Any Digital Input
DC Voltage Applied to I
OUT1
or I
OUT2
Voltage at V
REF
, R
FB
Inputs
NOTES:
1
Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a
stress rating only and functional operation at or above this specification is not implied. Exposure to maximum rating
conditions for extended periods may affect device reliability.
2
Any input pin which can see a value outside the absolute maximum ratings
should be protected by Schottky diode clamps
(HP5082-2835) from input pin to the supplies. All inputs have protection diodeswhich will protect the device from short
transients outside the supplies of less than 100mA for less than 100
μ
s.
+17 V
DC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . .
GND –0.5 to V
DD
+0.5 V
GND –0.5 to +17 V
. .
. . . . . . . . . . . . . . . . . . . . . .
+25 V
Storage Temperature Range
Package Power Dissipation Rating to 75
°
C
CDIP, PDIP, PLCC
Derates above 75
°
C
–65
°
C to 150
°
C
. . . . . . . . . . . .
1050mW
14mW/
°
C
. . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . .
APPLICATION NOTES
Refer to Applications Section for Additional Information
LATCH CONTROL
MSB
LATCH
LSB
LATCH
FUNCTION
0
1
0
0
Data Latched (Held)
Transfer (DB15-DB8) to DAC
0
1
Transfer (DB7-DB0) to DAC
1
1
Transparent Mode
ééé
ééé
éééééé
éééééé
éé
éé
Data Changing
Data Stable
DATA
LATCH
OUTPUT
t
S
t
DS
t
SW
TIMING DIAGRAM
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