參數(shù)資料
型號: MP7628KP
廠商: EXAR CORP
元件分類: DAC
英文描述: 5 V CMOS Quad Multiplying 8-Bit Digital-to-Analog Converter
中文描述: QUAD, PARALLEL, 8 BITS INPUT LOADING, 0.25 us SETTLING TIME, 8-BIT DAC, PQCC28
封裝: PLASTIC, LCC-28
文件頁數(shù): 1/12頁
文件大?。?/td> 124K
代理商: MP7628KP
MP7628
5 V CMOS
1
Rev. 2.00
FEATURES
Readback Capability for all DACs
On-Chip Latches for All DACs
Linearity Grades to +1/8 LSB
Single Supply Voltage (5 Volt)
DACs Matched to 1%
Four Quadrant Multiplication
Microprocessor TTL/CMOS Compatible
Latch-Up Free
Dual Version: MP7529B
Quad Multiplying 8-Bit
Digital-to-Analog Converter
APPLICATIONS
Microprocessor Controlled Gain and Attenuation
Circuits
Microprocessor Controlled/Programmable
Power Supplies
Hardware Redundant Applications Requiring
Data Readback
GENERAL DESCRIPTION
The MP7628 is a quad 8-bit Digital-to-Analog Converter de-
signed using a decoded DAC architecture featuring excellent
DAC-to-DAC matching and guaranteed monotonicity.
Separate on-chip latches are provided for each DAC to allow
easy microprocessor interface.
The readback function allows the user to poll or read the data
latches, eliminating the need for storing information in RAM. In
the event the microprocessor power supply is interrupted, it can
poll the DACs to establish the last known system state.
Data is transferred into any of the four DAC data latches via
common 8-bit TTL/CMOS compatible input port. Control inputs
DS1, DS2 and A/B determine which DAC is to be loaded. The
MP7628’s load cycle is similar to the write cycle of a random ac-
cess memory and the device is bus compatible with most 8-bit
microprocessors.
The device operates at +5 V power supply and dissipates
less than 5mW.
All DACs offer excellent four quadrant multiplication charac-
teristics with a separate reference input and feedback resistor
for each DAC.
THREE-STATE
BUFFER
SIMPLIFIED BLOCK DIAGRAM
THREE-STATE
BUFFER
LATCH A
DAC A
LATCH B
DAC B
THREE-STATE
BUFFER
LATCH C
DAC C
THREE-STATE
BUFFER
LATCH D
DAC D
BI-
DIRECTIONAL
LINE
DRIVER
CONTROL
LOGIC
DB0
(LSB)
DATA BUS
DB7
(MSB)
GND
V
DD
V
REFB
V
REFA
R
FBA
I
OUT1A
I
OUT2A
/
I
OUT2B
I
OUT1B
R
FBB
R
FBC
I
OUT1C
I
OUT2C
/
I
OUT2D
I
OUT1D
R
FBD
R
FB
V
REFD
V
REFC
R
FB
R
FB
R
FB
A/B
R/W
DS1
DS2
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