參數(shù)資料
型號: MP7652AS
廠商: EXAR CORP
元件分類: DAC
英文描述: 4-Channel Voltage Output 15 MHz, Input Bandwidth, 8-Bit Multiplying DACs with 3-Wire Serial Digital Port and Independent References
中文描述: QUAD, SERIAL INPUT LOADING, 0.275 us SETTLING TIME, 8-BIT DAC, PDSO24
封裝: 0.300 INCH, SOIC-24
文件頁數(shù): 5/16頁
文件大?。?/td> 179K
代理商: MP7652AS
MP7652
5
Rev. 1.00
ELECTRICAL CHARACTERISTICS TABLE
Description
Symbol
Min
Typ
Max
Units
Conditions
DIGITAL TIMING
SPECIFICATIONS
2, 4
Input Clock Pulse Width
Data Setup Time
Data Hold Time
CLK to SDO Propagation Delay
DAC Register Load Pulse Width
PRESET Pulse Width
Clock Edge to Load Rising Edge
Clock Edge to Load Falling Edge
Load Falling Edge to SDO
Tri-state Enable
Load Rising Edge to SDO
Tri-state Disable
Load Falling Edge to CLK Disable
Load Rising Edge to CLK Enable
LD Set-up Time with Respect
to CLK
t
CH
, t
CL
60
70
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
DS
t
DH
t
PD
t
LD
t
PR
150
100
50
100
t
CKLD1
t
CKLD2
t
HZ1
0
80
t
HZ2
40
ns
t
LDCK1
t
LDCK2
t
LDSU
30
60
20
ns
ns
ns
25
°
C
NOTES
1
2
3
4
5
Full Scale Range (FSR) is 3V.
Guaranteed but not production tested.
Digital input levels should not go below ground or exceed the positive supply voltage, otherwise damage may occur.
See Figures 1 and 2.
For reference input pulse: t
R
= t
F
> 100 ns.
Specifications are subject to change without notice
ABSOLUTE MAXIMUM RATINGS (TA = +25
°
C unless otherwise noted)
1, 2
V
CC
to V
REFN
V
EE
to V
REFN
V
CC
to DGND
V
EE
to DGND
V
REFP
1-4 to DGND, V
REFN
Digital Input & Output Voltage to DGND –0.5 to V
DD
+0.5 V
Operating Temperature Range
Extended Industrial
. . . . . . . . . . . . . . . . . . .
+6.5 V
–6.5 V
+13.0 V
–6.5 V
V
CC
to V
EE
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . .
–40
°
C to +85
°
C
Maximum Junction Temperature
–65
°
C to 150
°
C
. . . . . . . . .
Storage Temperature
150
°
C
+300
°
C
. . . . . . . . . . . . . . . . . . . . . . . . . .
Lead Temperature (Soldering, 10 sec)
. . . . . . . . . . .
Package Power Dissipation Rating @ 75
°
C
PDIP, SOIC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Derates above 75
°
C
. . . . . . . . . . . . . . . . . . . . . .
1000mW
6mW/
°
C
NOTES:
1
Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a
stress rating only and functional operation at or above this specification is not implied. Exposure to maximum rating
conditions for extended periods may affect device reliability.
Any input pin which can see a value outside the absolute maximum ratings
should be protected by Schottky diode clamps
(HP5082-2835) from input pin to the supplies. All inputs have protection diodeswhich will protect the device from short
transients outside the supplies of less than 100mA for less than 100
μ
s.
2
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