參數(shù)資料
型號: MP80C51C-30D
廠商: TEMIC SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 30 MHz, MICROCONTROLLER, PDIP40
文件頁數(shù): 22/170頁
文件大小: 4133K
代理商: MP80C51C-30D
118
ATtiny4/5/9/10 [DATASHEET]
8127F–AVR–02/2013
16.5
System and Reset Characteristics
Note:
1. Values are guidelines, only
16.5.1
Power-On Reset
Note:
1. Values are guidelines, only
2. Threshold where device is released from reset when voltage is rising
3. The Power-on Reset will not work unless the supply voltage has been below VPOA
16.5.2
V
CC Level Monitor
Note:
1. Typical values at room temperature
Table 16-4.
Reset, VLM, and Internal Voltage Characteristics
Symbol
Parameter
Condition
Typ
Max
Units
VRST
RESET Pin Threshold
Voltage
0.2 V
CC
0.9V
CC
V
tRST
Minimum pulse width on
RESET Pin
VCC = 1.8V
VCC = 3V
V
CC = 5V
2000
700
400
ns
tTOUT
Time-out after reset
32
64
128
ms
Table 16-5.
Characteristics of Enhanced Power-On Reset. T
A = -40 - 85C
Symbol
Parameter
Typ
Max
Units
VPOR
Release threshold of power-on reset (2)
1.1
1.4
1.6
V
VPOA
Activation threshold of power-on reset (3)
0.6
1.3
1.6
V
SRON
Power-On Slope Rate
0.01
V/ms
Table 16-6.
Voltage Level Monitor Thresholds
Parameter
Min
Typ (1)
Max
Units
Trigger level VLM1L
1.1
1.4
1.6
V
Trigger level VLM1H
1.4
1.6
1.8
Trigger level VLM2
2.0
2.5
2.7
Trigger level VLM3
3.2
3.7
4.5
Settling time VMLM2,VLM3 (VLM1H,VLM1L)
5 (50)
s
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