參數(shù)資料
型號(hào): MPC17531AR2
廠商: 飛思卡爾半導(dǎo)體(中國(guó))有限公司
元件分類: 基準(zhǔn)電壓源/電流源
英文描述: 700?mA Dual H-Bridge Motor Driver with 3.0V Compatible Logic I/O
中文描述: 700?毫安雙H橋電機(jī)驅(qū)動(dòng)器兼容邏輯為3.0V的I / O
文件頁(yè)數(shù): 3/19頁(yè)
文件大?。?/td> 501K
代理商: MPC17531AR2
Analog Integrated Circuit Device Data
Freescale Semiconductor
3
17531A
TERMINAL CONNECTIONS
TERMINAL CONNECTIONS
Figure 3. 17531A, 20-Terminal VMFP Connections
Table 1. 17531A, 20-Terminal VMFP Definitions
A functional description of each terminal can be found in the Functional Terminal Description section beginning on
page 10
.
Terminal
Number
Terminal
Name
Formal Name
Definition
1
VDD
Logic Supply
Control circuit power supply terminal.
2
IN1A
Logic Input Control 1A
Logic input control of OUT1A (refer to
Table 6, Truth Table
, page
9
).
3
IN1B
Logic Input Control 1B
Logic input control of OUT1B (refer to
Table 6, Truth Table
, page
9
).
4
PSAVE
Power Save
Logic input controlling power save mode.
5
OUT2A
H-Bridge Output 2A
Output A of H-Bridge channel 2.
6
PGND1
Power Ground 1
High-current power ground 1.
7
OUT1A
H-Bridge Output 1A
Output A of H-Bridge channel 1.
8
VM1
Motor Drive Power Supply 1
Positive power source connection for H-Bridge 1 (Motor Drive Power Supply).
9
CRES
Predriver Power Supply
Internal triple charge pump output as predriver power supply.
10
C2H
Charge Pump 2H
Charge pump bucket capacitor 2 (positive pole).
11
C1H
Charge Pump 1H
Charge pump bucket capacitor 1 (positive pole).
12
C1L
Charge Pump 1L
Charge pump bucket capacitor 1 (negative pole).
13
C2L
Charge Pump 2L
Charge pump bucket capacitor 2 (negative pole).
14
OUT1B
H-Bridge Output 1B
Output B of H-Bridge channel 1.
15
PGND2
Power Ground 2
High-current power ground 2.
16
OUT2B
H-Bridge Output 2B
Output B of H-Bridge channel 2.
17
VM2
Motor Drive Power Supply 2
Positive power source connection for H-Bridge 2 (Motor Drive Power Supply).
18
IN2B
Logic Input Control 2B
Logic input control of OUT2B (refer to
Table 6, Truth Table
, page
9
).
19
IN2A
Logic Input Control 2A
Logic input control of OUT2A (refer to
Table 6, Truth Table
, page
9
).
20
LGND
Logic Ground
Low-current logic signal ground.
VDD
IN1B
OUT1A
VM1
CRES
C2H
PSAVE
OUT2A
PGND1
IN1A
LGND
VM2
OUT2B
PGND2
OUT1B
C2L
C1L
C1H
IN2A
IN2B
4
5
6
7
8
9
10
2
3
20
18
14
13
12
11
17
16
15
19
1
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