參數(shù)資料
型號： MPC2105ASG66
廠商： MOTOROLA INC
元件分類： DRAM
英文描述： 512KB and 1MB BurstRAM Secondary Cache Modules for PowerPC PReP/CHRP Platforms
中文描述： 64K X 72 CACHE TAG SRAM MODULE, 9 ns, DMA178
文件頁數(shù)： 15/24頁
文件大?。?/td> 228K
代理商： MPC2105ASG66
MPC2104
MPC2105
MPC2106
MPC2107
15
MOTOROLA FAST SRAM
ASYNCHRONOUS DATA RAMs WRITE CYCLE 2
(E Controlled, See Notes 1 and 2)
MPC2107–15
Parameter
Symbol
Min
Max
Unit
Notes
Write Cycle Time
tAVAV
tAVEL
tAVEH
tELEH
tELWH
15
—
ns
0
Address Setup Time
0
—
ns
Address Valid to End of Write
12
—
ns
Enable to End of Write
10
—
ns
3, 4
Data Valid to End of Write
tDVEH
tEHDX
tEHAX
7
—
ns
Data Hold Time
0
—
ns
Write Recovery Time
0
—
ns
NOTES:
1. A write occurs during the overlap of E low and W low.
2. All timings are referenced from the last valid address to the first transitioning address.
3. If E goes low coincident with or after W goes low, the output will remain in a high impedance state.
4. If E goes high coincident with or before W goes high, the output will remain in a high impedance state.
ASYNCHRONOUS WRITE CYCLE 2 (E Controlled, See Note 1)
tEHDX
tDVEH
tEHAX
tELWH
tELEH
tAVEL
tAVEH
DATA VALID
tAVAV
HIGH–Z
A (ADDRESS)
W (WRITE ENABLE)
E (CHIP ENABLE)
Q (DATA OUT)
D (DATA IN)
tWLEH
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MPC2105BSG66 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:512KB and 1MB BurstRAM Secondary Cache Modules for PowerPC PReP/CHRP Platforms
MPC2105C 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:512KB and 1MB BurstRAM Secondary Cache Modules for PowerPC PReP/CHRP Platforms
MPC2105CDG66 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:512KB and 1MB BurstRAM Secondary Cache Modules for PowerPC PReP/CHRP Platforms
MPC2105PDG66 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:256KB/512KB BurstRAM Secondary Cache Modules for PowerPC PReP/CHRP Platforms
MPC2105SG66 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:256KB and 512KB BurstRAM Secondary Cache Modules for PowerPC PReP/CHRP Platforms
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