參數(shù)資料
型號(hào)： MPC5606SVMG6
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 64 MHz, MICROCONTROLLER, PBGA208
封裝： 17 X 17 MM, 1 MM PITCH, MAPBGA-208
文件頁(yè)數(shù)： 10/134頁(yè)
文件大?。?/td> 890K
代理商： MPC5606SVMG6
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Electrical characteristics
MPC560xS Microcontroller Data Sheet, Rev. 5
Preliminary—Subject to Change Without Notice
Freescale Semiconductor
107
Figure 31. TFT LCD interface timing overview1
3.20.3.1
Interface to TFT LCD panels — pixel-level timings
Figure 32 depicts the horizontal timing (timing of one line), including both the horizontal sync pulse and data. All parameters
shown in the diagram are programmable. This timing diagram corresponds to positive polarity of the DCU_CLK signal
(meaning the data and sync signals change on the rising edge) and active-high polarity of the DCU_HSYNC, DCU_VSYNC
and DCU_DE signals. The user can select the polarity of the DCU_HSYNC and DCU_VSYNC signals via the SYN_POL
register, whether active-high or active-low. The default is active-high. The DCU_DE signal is always active-high.
Pixel clock inversion and a flexible programmable pixel clock delay are also supported. They are programmed via the DCU
Clock Confide Register (DCCR) in the system clock module.
The DELTA_X and DELTA_Y parameters are programmed via the DISP_SIZE register. The PW_H, BP_H and FP_H
parameters are programmed via the HSYN PARA register. The PW_V, BP_V and FP_V parameters are programmed via the
VSYN_PARA register.
1. In Figure 31, the “DCU_LD[23:0]” signal is an aggregation of the DCU’s RGB signals—DCU_R[0:7], DCU_G[0:7] and
DCU_B[0:7].
Table 57. LCD Interface timing parameters—horizontal and vertical
Symbol
C
Parameter
Value
Unit
tPCP
CC
D Display pixel clock period
—
ns
tPWH
CC
D HSYNC pulse width
PW_H
t
PCP
ns
tBPH
CC
D HSYNC back porch width
BP_H
t
PCP
ns
tFPH
CC
D HSYNC front porch width
FP_H
t
PCP
ns
tSW
CC
D Screen width
DELTA_X
t
PCP
ns
tHSP
CC
D HSYNC (line) period
(PW_H + BP_H + FP_H + DELTA_X )
t
PCP
ns
tPWV
CC
D VSYNC pulse width
PWV
t
HSP
ns
LINE 1
LINE 2
LINE 3
LINE 4
LINE n-1
LINE n
DCU_VSYNC
DCU_HSYNC
DCU_DE
DCU_CLK
DCU_LD[23:0]
2
13
m-1
m
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
MPC5606S
products
in
208
MAPBGA
packages
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