
Queued Serial Multi-Channel Module
MPC561/MPC563 Reference Manual, Rev. 1.2
Freescale Semiconductor
15-43
Figure 15-24. SCI Transmitter Block Diagram
LO
OPS
WO
MS
IL
T
PT
PE
M
W
AKE
TIE
TCIE
RI
E
ILIE
TE
RE
RW
U
SBK
Transmitter
Control Logic
Pin Buffer
And Control
H (8) 76543210 L
10 (11)-Bit TX Shift Register
TxD
SCxDR TX Buffer
TRANSFER
Tx
Buf
fer
SHIFT
Enable
JAM
Enabl
e
PRE
A
MBLE—JAM
1's
BRE
AK—JAM
0's
Force
Pin
Direction
(Out)
SIZE
8/9
Parity
Generator
Transmitter
Baud Rate
Clock
TC
TDRE
SCI Rx
Requests
SCI Interrupt
Request
FE
NF
OR
IDLE
R
DRF
TC
TDRE
SCxSR STATUS Register
PF
Internal
Data Bus
RAF
TIE
TCIE
SCCxR1 CONTROL Register
1 0
15
0
St
ar
t
St
op
Ope
nDrain
Output
Mod
eEnabl
e
(WRITE-ONLY)