
XPC750P RISC Microprocessor Hardware Specications
15
PRELIMINARYSUBJECT TO CHANGE WITHOUT NOTICE
Electrical and Thermal Characteristics
1.4.2.5 L2 Bus Input AC Specications
The L2 bus input interface AC timing specications are found in
Table 12..Figure 7. shows the L2 bus input timing diagrams for the XPC750P.
Figure 7. L2 Bus Input Timing Diagrams
Table 12. L2 Bus Input Interface AC Timing Specifications1
At recommended operating conditions (See
Table 3.)Num
Characteristic
Processor Frequency
300-400 MHz
Unit
Notes
Min
Max
29,30
L2SYNC_IN rise and fall time
1.0
ns
2
24
Data and parity input setup to L2SYNC_IN
1.5
ns
25
L2SYNC_IN to data and parity input hold
0
ns
Notes:
1. All input specications are measured from the TTL level (0.8V or 2.0V) of the signal in question to the
midpoint voltage of the rising edge of the input L2SYNC_IN. Input timings are measured at the pins (See
2. Rise and fall times for the L2SYNC_IN input are measured from 0.4 to 2.4V.
VM
VM = Midpoint Voltage (1.4V)
L2SYNC_IN
25
24
ALL INPUTS
29
30
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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